STM8L051F3 datasheet(49/96 Pages) STMICROELECTRONICS

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DS9178 Rev 4

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STM8L051F3

Electrical parameters

8.3.2

Embedded reset and power control block characteristics

The reset and power block parameters are described in Table 16 and are derived from tests

performed under the ambient temperature conditions summarized in Table 15: General

operating conditions.

Table 16. Embedded reset and power control block characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

tVDD

VDD rise time rate

BOR detector

enabled

0(1)

∞(1)

µs/V

VDD fall time rate

BOR detector

enabled

20(1)

∞(1)

tTEMP

Reset release delay

VDD rising

-3-

VPDR

Power-down reset threshold

Falling edge

1.30(2)

1.50

1.65

VBOR0

Brown-out reset threshold 0

(BOR_TH[2:0]=000)

Falling edge

1.67

1.70

1.74

Rising edge

1.69

1.75

1.80

VBOR1

Brown-out reset threshold 1

(BOR_TH[2:0]=001)

Falling edge

1.87

1.93

1.97

Rising edge

1.96

2.04

2.07

VBOR2

Brown-out reset threshold 2

(BOR_TH[2:0]=010)

Falling edge

2.22

2.3

2.35

Rising edge

2.31

2.41

2.44

VBOR3

Brown-out reset threshold 3

(BOR_TH[2:0]=011)

Falling edge

2.45

2.55

2.60

Rising edge

2.54

2.66

2.7

VBOR4

Brown-out reset threshold 4

(BOR_TH[2:0]=100)

Falling edge

2.68

2.80

2.85

Rising edge

2.78

2.90

2.95

VPVD0

PVD threshold 0

Falling edge

1.80

1.84

1.88

Rising edge

1.88

1.94

1.99

VPVD1

PVD threshold 1

Falling edge

1.98

2.04

2.09

Rising edge

2.08

2.14

2.18

VPVD2

PVD threshold 2

Falling edge

2.2

2.24

2.28

Rising edge

2.28

2.34

2.38

VPVD3

PVD threshold 3

Falling edge

2.39

2.44

2.48

Rising edge

2.47

2.54

2.58

VPVD4

PVD threshold 4

Falling edge

2.57

2.64

2.69

Rising edge

2.68

2.74

2.79

VPVD5

PVD threshold 5

Falling edge

2.77

2.83

2.88

Rising edge

2.87

2.94

2.99

VPVD6

PVD threshold 6

Falling edge

2.97

3.05

3.09

Rising edge

3.08

3.15

3.20

1. Guaranteed by design.

2. Guaranteed by characterization results.

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