SN250QT datasheet(50/130 Pages) STMICROELECTRONICS

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Functional description—application modules

SN250

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7.2.3

I2C master mode

The SC1 I2C controller is only available in master mode. The SC1 I2C controller is enabled

with SC1_MODE set to 3. The I2C Master controller supports Standard (100 Kbps) and Fast

(400 Kbps) I2C modes. Address arbitration is not implemented, so multiple master

applications are not supported. The I2C signals are pure open-collector signals, and

external pull-up resistors are required.

The SC1 I2C mode has the following features:

●

Programmable clock frequency (400kHz max.)

●

Supports both 7-bit and 10-bit addressing

The following signals can be made available on the GPIO pins:

●

MSDA (serial data)

●

MSCL (serial clock)

The I2C Master controller obtains its reference clock from a programmable clock generator.

Clock rates are set by a clock division ratio from the 24MHz clock:

EXP is written to the SC1_RATEEXP register and LIN to the SC1_RATELIN register.

Table 22 shows the rate settings for Standard I2C (100 Kbps) and Fast I2C (400 Kbps)

operation.

Note that at 400 Kbps, the I2C specification requires the minimum low period of SCL to be

1.3µs. To be strictly I2C compliant, the rate needs to be lowered to 375 Kbps.

The I2C Master controller supports generation of various frame segments controlled with the

SC1_I2CCTRL1

registers. Table 23 summarizes these frames.

Table 22.

I2C nominal rate programming

Nominal Rate

SC1_RATELIN

SC1_RATEEXP

100 Kbps

375 Kbps

400 Kbps

Nominal Rate

24MHz

2LIN

() 2

EXP

⋅⋅

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