Features

– Internal Address and Data Latches for 64 Bytes

– Internal Control Timer

– Page Write Cycle Time: 3 ms Maximum

– 1 to 64-byte Page Write Operation

– Endurance: 10

– Data Retention: 10 Years

±10% Supply

Description

The AT28HC256N is a high-performance electrically erasable and programmable read

only memory. Its 256K of memory is organized as 32,768 words by 8 bits. Manufac-

tured with Atmel’s advanced nonvolatile CMOS technology, the AT28HC256N offers

access times to 90 ns with power dissipation of just 440 mW. When the AT28HC256N

is deselected, the standby current is less than 3 mA.

The AT28HC256N is accessed like a Static RAM for the read or write cycle without the

need for external components. The device contains a 64-byte page register to allow

writing of up to 64 bytes simultaneously. During a write cycle, the address and 1 to 64

bytes of data are internally latched, freeing the addresses and data bus for other oper-

ations. Following the initiation of a write cycle, the device will automatically write the

latched data using an internal control timer. The end of a write cycle can be detected

by DATA Polling of I/O

access for a read or write can begin.

Atmel’s AT28HC256N has additional features to ensure high quality and manufactura-

bility. The device utilizes internal error correction for extended endurance and

improved data retention characteristics. An optional software data protection mecha-

nism is available to guard against inadvertent writes. The device also includes an extra

64 bytes of EEPROM for device identification or tracking.

256 (32K x 8)

High-speed

Parallel

EEPROM

AT28HC256N

3446B–PEEPR–4/04

Pin Configurations

Pin Name

Function

A0 - A14

Addresses

CE

Chip Enable

OE

Output Enable

WE

Write Enable

I/O0 - I/O7

Data Inputs/Outputs

NC

No Connect

LCC, PLCC

Top View

5

6

7

8

9

10

11

12

13

29

28

27

26

25

24

23

22

21

A6

A5

A4

A3

A2

A1

A0

NC

I/O0

A8

A9

A11

NC

OE

A10

CE

I/O7

I/O6