AT28HC256N datasheet(6/13 Pages) ATMEL

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AT28HC256N

3446B–PEEPR–4/04

AC Read Waveforms(1)(2)(3)(4)

Notes:

1. CE may be delayed up to t

ACC - tCE after the address transition without impact on tACC.

2. OE may be delayed up to t

CE - tOE after the falling edge of CE without impact on tCE or by tACC - tOE after an address change

without impact on tACC.

3. t

DF is specified from OE or CE whichever occurs first (CL = 5 pF).

4. This parameter is characterized and is not 100% tested.

Note:

1. This parameter is characterized and is not 100% tested.

AC Read Characteristics

Symbol

Parameter

AT28C256N-90

AT28HC256N-12

Units

Min

Max

Min

Max

ACC

Address to Output Delay

120

tCE

(1)

CE to Output Delay

120

(2)

OE to Output Delay

(3)(4)

CE or OE to Output Float

Output Hold from OE, CE or Address,

whichever occurred first

tCE

tOE

tACC

tDF

tOH

Input Test Waveforms and Measurement Level

Output Test Load

R, tF < 5 ns

Pin Capacitance

f = 1 MHz, T = 25°C

(1)

Symbol

Typ

Max

Units

Conditions

CIN

VIN = 0V

OUT

812

OUT = 0V

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