MPC5553 datasheet(22/60 Pages) FREESCALE

22 / 60 page

MPC5553 Microcontroller Data Sheet, Rev. 0

Preliminary—Subject to Change Without Notice

Electrical Characteristics

Freescale Semiconductor

Table 16 shows the FLASH_BIU settings versus frequency of operation. Refer to the device Reference

Manual for definitions of these bit-fields.

64 Kbyte Block Pre-program and Erase Time

T64kpperase

—

400

500

5000

128 Kbyte Block Pre-program and Erase Time

T128kpperase

—

500

1250

15,000

Minimum operating frequency for program and erase

operations6

—25

—

MHz

1 Typical program and erase times assume nominal supply values and operation at 25 oC.

2 Initial factory condition:

≤ 100 program/erase cycles, 25 oC, typical supply voltage, 80MHz minimum system frequency.

3 The maximum erase time occurs after the specified number of program/erase cycles. This maximum value is characterized

but not guaranteed.

4 Actual hardware programming times. This does not include software overhead.

5 Page size is 256 bits (8 words).

6 Read frequency of the flash can be up to the maximum operating frequency of the device. There is no minimum read frequency

condition.

Table 15. Flash EEPROM Module Life (Full Temperature Range)

Num

Characteristic

Symbol

Min

Typical1

1 Typical endurance is evaluated at 25C. Product qualification is performed to the minimum specification. For additional

information on the Freescale definition of Typical Endurance, please refer to Engineering Bulletin EB619 “Typical Endurance

for Nonvolatile Memory.”

Unit

Number of Program/Erase cycles per block for 16 Kbyte, 48 Kbyte, and 64

Kbyte blocks over the operating temperature range (TJ)

P/E

100,000

—

cycles

Number of Program/Erase cycles per block for 128 Kbyte blocks over the

operating temperature range (TJ)

P/E

10,000

100,000

cycles

Data retention

Blocks with 0 – 1,000 P/E cycles

Blocks with 1,001 – 100,000 P/E cycles

Retention

—years

Table 16. FLASH_BIU Settings vs. Frequency of Operation

Maximum Frequency (MHz)

APC

RWSC

WWSC

DPFEN

IPFEN

PFLIM

BFEN

up to and including 82 MHz1

1 This setting allows for 80 MHz system clock with 2% frequency modulation.

0b001

0b01

0b00,

0b01, or

0b112

0b00,

0b01, or

0b112

0b000-

0b1103

0b0, 0b14

up to and including 102 MHz5

0b001

0b010

0b01

0b00,

0b01, or

0b112

0b00,

0b01, or

0b112

0b000-

0b1103

0b0, 0b14

up to and including132 MHz6

0b010

0b011

0b01

0b00,

0b01, or

0b112

0b00,

0b01, or

0b112

0b000-

0b1103

0b0, 0b14

Default Setting after Reset

0b111

0b11

0b00

0b000

0b0

Table 14. Flash Program and Erase Specifications1 (continued)

Num

Characteristic

Symbol

Min

Typ

Initial

Max2

Max3

Unit

MPC5553 データシート(PDF) 22 Page - Freescale Semiconductor, Inc

MPC5553 データシート(HTML) 22 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

データシートダウンロード

リンク URL

MPC5553 データシート(PDF) 22 Page - Freescale Semiconductor, Inc

MPC5553 データシート(HTML) 22 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

データシート ダウンロード

リンク URL

データシートダウンロード