| データシートサーチシステム |
|
M65KA128AL データシート(PDF) 27 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
M65KA128AL データシート(HTML) 27 Page - STMicroelectronics |
|
27 / 53 page ![]() M65KA128AL DC and AC parameters 27/53 Table 14. Asynchronous AC Characteristics Symbol Parameter M65KA128AL Unit(1) Min Max tDPL Data Input Valid to Precharge Command 2 tCK tDAL Data Input Valid to Bank/Row Activate Command CAS Latency = 3 2CLK + 28.5 ns CAS Latency = 2 2CLK + 30 ns tDQZ UDQM or LDQM High to Data Output Hi-Z 2 tCK tDQM UDQM or LDQM High to Data Input Masked 0 tCK tMRD Mode Register Set Cycle Time 2 tCK tRC RAS Cycle Time 86 ns tRCD Delay Time, RAS Active to CAS Active 28.5 ns tRAS RAS Active Time 57 120,000 ns tRP RAS Precharge Time 28.5 ns tRRD Delay Time, RAS Active to RAS Bank Active 2 tCK tRC1 Auto Refresh Exit Time 105 ns tRC2 (2) Self Refresh Exit Time 105 ns tREF Refresh Time 64 ms tτ Transition Time 1 30 ns tWTL Delay Time, Write Command to Data Input 0 tCK 1. The unit tCK is the system Clock cycle time. 2. A new command can be issued tRC after the Self Refresh mode is exited. |
|
リンク URL |
| ALLDATASHEETはお客様のビジネスに役立ちますか? [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | データシートへのリンク | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |