L6566A

List of figures

5/51

List of figures

Figure 1.

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Figure 2.

Typical system block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 3.

Pin connection (through top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 4.

Multi-mode operation with QR option active . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 5.

High-voltage start-up generator: internal schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 6.

Timing diagram: normal power-up and power-down sequences . . . . . . . . . . . . . . . . . . . . 19

Figure 7.

Timing diagram showing short-circuit behavior (SS pin clamped at 5V). . . . . . . . . . . . . . . 20

Figure 8.

Zero current detection block, triggering block, oscillator block and related logic . . . . . . . . 20

Figure 9.

Drain ringing cycle skipping as the load is gradually reduced . . . . . . . . . . . . . . . . . . . . . . 21

Figure 10.

Operation of ZCD, triggering and Oscillator blocks (QR option active). . . . . . . . . . . . . . . . 23

Figure 11.

Load-dependent operating modes: timing diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 12.

Addition of an offset to the current sense lowers the burst-mode operation threshold . . . . 25

Figure 13.

Adaptive UVLO block. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 14.

Possible feedback configurations that can be used with the L6566A . . . . . . . . . . . . . . . . . 26

Figure 15.

Externally controlled burst-mode operation by driving pin COMP: timing diagram. . . . . . . 27

Figure 16.

Typical power capability change vs input voltage in QR flyback converters . . . . . . . . . . . 28

Figure 17.

Left: Overcurrent setpoint vs. VFF voltage; right: Line Feedforward function block . . . . . . 29

Figure 18.

Hiccup-mode OCP: timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Figure 19.

Possible interfaces between the L6566A and a PFC controller . . . . . . . . . . . . . . . . . . . . . 32

Figure 20.

Operation after latched disable activation: timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . 33

Figure 21.

Soft-start pin operation under different operating conditions and settings . . . . . . . . . . . . . 34

Figure 22.

OVP Function: internal block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Figure 23.

OVP function: timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Figure 24.

Maximum allowed duty cycle vs. switching frequency for correct OVP detection. . . . . . . . 37

Figure 25.

Brownout protection: internal block diagram and timing diagram . . . . . . . . . . . . . . . . . . . . 38

Figure 26.

Ac voltage sensing with the L6566A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Figure 27.

Slope compensation waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Figure 28.

Typical low-cost application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Figure 29.

Typical full-feature application schematic (QR operation) . . . . . . . . . . . . . . . . . . . . . . . . . 44

Figure 30.

Typical full-feature application schematic (FF operation) . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Figure 31.

Frequency foldback at light load (FF operation) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Figure 32.

Latched shutdown upon mains overvoltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46