LAN9252SLASHML datasheet(310/329 Pages) MICROCHIP

310 / 329 page

LAN9252

DS00001909A-page 310

 2015 Microchip Technology Inc.

18.4.2

INTERNAL REGULATOR ENABLED

Note 12:

VDD33TXRX1, VDD33TXRX2, VDD33BIAS, VDD33, VDDIO

Note 13:

VDD12TX1 and VDD12TX2, are driven by the internal regulator via the PCB. The current is accounted for

via VDD33.

Note 14:

Current measurements do not include power applied to the magnetics or the optional external LEDs.

Note 15:

The Ethernet component current is independent of the supply rail voltage (2.5V or 3.3V) of the transformer.

Two copper TP operation is assumed. Current is half if one PHY is using 100BASE-FX mode. Current is

zero if both PHYs are using 100BASE-FX mode.

Note 16:

This includes the power dissipated by the transmitter by way of the current through the transformer.

Note 17:

3.3*(A) + (2.5)*(C) @ Typ

Note 18:

3.3*(A) + (3.3)*(C) @ Typ

TABLE 18-5:

CURRENT CONSUMPTION AND POWER DISSIPATION (REGS. ENABLED)

3.3 V

Device

Current

(mA)

(A)

Note 12,

Note 13,

Note 14

Magnetics

Current

(mA)

(C)

Note 15

Device

Power

with 2.5 V

Magnetics

(mW)

Note 16,

Note 17

Device

Power

with 3.3 V

Magnetics

(mW)

Note 16,

Note 18

Reset (RST#)

Typ.

51.2

0.0

169

D0, 100BASE-TX

with Traffic

Typ.

112.0

82.0

576

642

D0, 100BASE-TX

Idle

Typ.

113.5

82.0

580

646

D0, PHY Energy Detect

Power Down (both PHYs)

Typ.

39.7

0.0

132

D0, PHY General

Power Down (both PHYs)

Typ.

33.0

0.0

109

D1, 100BASE-TX

Idle

Typ.

100.5

82.0

537

603

D1, PHY Energy Detect

Power Down (both PHYs)

Typ.

26.0

0.0

D1, PHY General

Power Down (both PHYs)

Typ.

19.4

0.0

D2, 100BASE-TX

Idle

Typ.

100.5

82.0

537

603

D2, PHY Energy Detect

Power Down (both PHYs)

Typ.

14.8

0.0

D2, PHY General

Power Down (both PHYs)

Typ.

7.8

0.0

D3, PHY General

Power Down (both PHYs)

Typ.

4.3

0.0

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