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LAN9252/ML データシート(PDF) 308 Page - Microchip Technology |
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LAN9252/ML データシート(HTML) 308 Page - Microchip Technology |
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308 / 329 page  LAN9252 DS00001909A-page 308 2015 Microchip Technology Inc. 18.3 Package Thermal Specifications Note: Thermal parameters are measured or estimated for devices in a multi-layer 2S2P PCB per JESD51. TABLE 18-1: 64-PIN QFN PACKAGE THERMAL PARAMETERS Parameter Symbol Value Units Comments Thermal Resistance Junction to Ambient JA 23.6 °C/W Measured in still air Thermal Resistance Junction to Bottom of Case JT 0.1 °C/W Measured in still air Thermal Resistance Junction to Top of Case JC 1.8 °C/W Airflow 1 m/s TABLE 18-2: 64-PIN TQFP-EP PACKAGE THERMAL PARAMETERS Parameter Symbol Value Units Comments Thermal Resistance Junction to Ambient JA 29.0 °C/W Measured in still air Thermal Resistance Junction to Bottom of Case JT 0.3 °C/W Measured in still air Thermal Resistance Junction to Top of Case JC 12.8 °C/W Airflow 1 m/s TABLE 18-3: MAXIMUM POWER DISSIPATION Mode Maximum Power (mW) Internal Regulator Disabled, 2.5 V Ethernet Magnetics 568 Internal Regulator Disabled, 3.3 V Ethernet Magnetics 640 Internal Regulator Enabled, 2.5 V Ethernet Magnetics 749 Internal Regulator Enabled, 3.3 V Ethernet Magnetics 821 |
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