SII3531A datasheet(21/81 Pages) SILICONIMAGE

21 / 81 page

PCI Express to Serial ATA Controller

Data Sheet

Silicon Image, Inc.

SiI-DS-0208-C

5.2 SiI3531A S-ATA Port Block Diagram

The block diagram below shows the logic structure of the SiI3531A Serial-ATA Port.

Data Path B

(Initiator)

Local Arbiter

PCI Exp – LRAM

DMA Controller

Data Path A

2 Addresses

PCI Exp – SATA

DMA Controller

Data Path B

1 Address

Command Fetch

Machine

Command

Fetch FIFO

31 x 5

Command

Execution

Machine

Command

Execute FIFO

31 x 5

Command

Receive FIFO

31 x 5

PCI Exp Application

Interface

Initiator

Target

PCI Exp / SATA

Data FIFO

128 x 64

SATA

Enhanced

Link

Rx FIFO

Registers

SATA PHY

Port Register File

Data Path A

(Initiator / Target)

LRAM

512 x 64

Dual Port

Figure 5-2 Port Logic Block Diagram

The Port Logic consists of:

•

A Local Arbiter that arbitrates between the two DMA Controllers

•

A DMA Controller for the PCI Express to LRAM Data Path

•

A DMA Controller for the PCI Express to Serial-ATA Data Path

•

A 512x64 Local RAM (LRAM) that contains: 31 LRAM Slots each of which is 128 bytes (16 Qwords) and 128 bytes

used to support 16 Port Multiplier devices (1 Qword per device)

•

A Data FIFO that contains 1024 bytes (128 Qwords)

•

A State Machine for Command Fetch

•

A State Machine for Command Execution

•

A Serial-ATA Link

•

A Serial-ATA PHY

Each of the two state machines has an associated FIFO which, when non-empty, indicates that processing is required. The

FIFO is loaded with a 5-bit command “slot” number to activate a state machine. The slot number can range from 0 to 30,

corresponding to the maximum number of active commands supported.

Command flow begins with a host driver building a command in a non-cached region of host memory. The data structure is

referred to as a PRB (Port Request Block). The 64-byte PRB is transferred into an available command slot in the LRAM by

one of two methods: the direct method or the indirect method. The host driver is responsible for determining which slots are

available. Either of the two command transfer methods may be used for each command transfer. The two methods are:

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