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SII3531A データシート(PDF) 74 Page - Silicon image |
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SII3531A データシート(HTML) 74 Page - Silicon image |
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74 / 81 page PCI Express to Serial ATA Controller Data Sheet Silicon Image, Inc. © 2006 Silicon Image, Inc. SiI-DS-0208-C 74 6.3.19 Port Context Register Address Offset: 1E04H Access Type: Read 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 Reserved PM Port Slot • Bit [31:09]: Reserved • Bit [08:05]: PM Port (R). This field contains the Port Multiplier port number corresponding to the last FIS transferred (transmit or receive). Upon a processing halt due to a device specific error, this field contains the PM port corresponding to the device that returned error status. • Bit [04:00]: Slot (R). This field contains the slot number of the last command processed by the execution unit. Note that this slot number does not necessarily correspond to the command in error during error halt conditions. For native queue error recovery, the command slot in error must be determined by issuing a READ LOG EXTENDED to the device to determine the tag number of the command in error. 6.3.20 SControl Address Offset: 1F00H Access Type: Read/Write Reset Value: 0x0000_0000 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 Reserved PMP SPM IPM SPD DET This register is the SControl register as defined by the Serial ATA specification (section 10.1.3). • Bit [31:16]: Reserved (R). This bit field is reserved and returns zeros on a read. • Bit [19:16]: PMP (R/W). This field identifies the currently selected Port Multiplier port for accessing the SActive register and some bit fields of the Diagnostic registers. • Bit [15:12]: SPM (R/W). This field selects a power management state. A non-zero value written to this field causes initiation of the select power management state. This field self-resets to 0 as soon as action begins to initiate the power management state transition. Value Definition 0000 No power management state transition requested 0001 Transition to the Partial power management state initiated 0010 Transition to the Slumber power management state initiated 0100 Transition from a power management state initiated (ComWake asserted) others Reserved • Bit [11:08]: IPM (R/W) – This field identifies the interface power management states that may be invoked via the Serial ATA interface power management capabilities. Value Definition 0000 No interface power management restrictions (Partial and Slumber modes enabled) 0001 Transitions to the Partial power management state are disabled 0010 Transitions to the Slumber power management state are disabled 0011 Transitions to both the Partial and Slumber power management states are disabled others Reserved • Bit [07:04]: SPD (R/W) – This field identifies the highest allowed communication speed the interface is allowed to negotiate. Value Definition 0000 No restrictions (default value) 0001 Limit to Generation 1 (1.5 Gb/s) |
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