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L9800 データシート(PDF) 32 Page - STMicroelectronics |
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L9800 データシート(HTML) 32 Page - STMicroelectronics |
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32 / 55 page ![]() Four parameters can be set: 1. Duty cycle (bits PWM_LED_DC.DUTY_CYCLE) 8 bits are available to achieve 0.39% duty cycle resolution. When the microcontroller programs a new duty cycle, the PWM LED generator waits until the previous cycle is completed before using the new duty cycle (this happens also when the duty cycle is 100%) - the new duty cycle is taken with the next PWM cycle, while the new duty cycle is immediately taken if the previous DC was 0%). Maximum duty cycle achievable is 100% (PWM_LED_DC.DUTY_CYCLE set to “11111111B”) 2. Frequency (bits CFG_2.PWM_DIV_LED) Using 2 bits it is possible to select the divider for fINT to achieve the needed duty cycle: – 00B = PWM frequency is 122.5 Hz – 01B = PWM frequency is 245.1 Hz – 10B = PWM frequency is 490.2 Hz – 11B = PWM frequency is 980.4 Hz 3. Mapping registers (PWM_SEL and PWM_MAP) To correctly use the PWM LED generator: • Configure the channel output control and mapping register (PWM_SEL and PWM_MAP). • Write the duty cycle control register (PWM_LED_DC) to enable the PWM LED generation. 7.4 Electrical parameters 3 V < VBATT < 18 V, 3 V < VDDIO < 5.5 V, T J = -40 °C to 150 °C, unless otherwise noticed. Table 14. Power stages electrical parameters Symbol Description Test condition Min. Typ. Max. Unit Power stage RDS(ON) On-state resistance TJ = 25 °C 0.77 Ω TJ = 150 °C, IL= 100 mA 1.7 Ω IL(NOM) Nominal load current (all channels active) TJ ≤ 150 °C, design info 260 500 mA IL(EAR) Load current for maximum energy dissipation–repetitive (all channels active) TJ ≤ 150°C, design info 220 mA VLS_DS(CL) Drain to source output clamping voltage IL = 10mA 45 47 49 V IL(OFF)_LS Output leakage current (each channel) TJ = 150 °C VBATT = 0 V, VDDIO = 0 V, VSOURCE= 0 V, VDS = 28 V (with at least another channel’s VDS= 29 V), TJ up to 150°C -4 0 4 µA E AR Maximum energy dissipation repetitive pulses - 2*IL(EAR) (two channels in parallel) TJ(0) = 85 °C, IL(0) = 2*IL(EAR), 2*106 cycles 15 mJ EAS Maximum energy dissipation single pulse T = 25 °C, IL = 2 * 200 mA 50 mJ Maximum energy dissipation single pulse T = 150 °C, IL = 400 mA 25 mJ EAR Maximum energy dissipation repetitive pulses - IL(EAR) T = 85 °C, 2*106 cycles 10 mJ Timings tDELAY(ON) Turn-ON delay (from INn pin or bit to VOUT = 90% VBATT) RL = 50 Ω, VBATT = 14 V, Active or limp-home mode 1.5 4 µs tDELAY(OFF) Turn-OFF delay (from INn pin or bit to VOUT = 10% VBATT) RL = 50 Ω, VBATT = 14 V, Active or limp-home mode 2.5 10 21 µs L9800 Power stages DS14041 - Rev 2 page 32/55 |
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