 |
データシートサーチシステム |
|
|
データシートサーチシステム |
|
L9800 データシート(PDF) 41 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
L9800 データシート(HTML) 41 Page - STMicroelectronics |
|
|
41 / 55 page  Figure 31. Daisy chain GADG081120231031GT Device 1 Device 3 Device 2 MO SI SI SI SO SO SO MI MCSN MCLK SPI SPI SPI In the SPI block of each device, there is one shift register where each bit from the MOSI line is shifted in each CLK. The bit shifted out occurs at the MISO pin. After 16 CLK cycles, the data transfer for one device is finished. In single chip configuration, the NCS line must turn “high” to make the device acknowledge the transferred data. In daisy chain configuration, the data shifted out at device 1 has been shifted into device 2. When using three devices in daisy chain, more than 16 bits have to be shifted through the devices (depending on how many devices are connected and how many SPI bits they have). After that, the MNCS line must turn “high” (see the Figure 32). Figure 32. Data transfer in daisy chain MI MO MNCS MCLK SI device 3 SI device 2 SI device 1 SO device 3 SO device 2 SO device 1 11.3 Timing diagrams Figure 33. Timing diagram L9800 Serial peripheral interface (SPI) DS14041 - Rev 2 page 41/55 |
|
リンク URL |
| ALLDATASHEETはお客様のビジネスに役立ちますか？ [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | データシートへのリンク | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Japanese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
