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L9800 データシート(PDF) 33 Page - STMicroelectronics |
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L9800 データシート(HTML) 33 Page - STMicroelectronics |
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33 / 55 page ![]() Symbol Description Test condition Min. Typ. Max. Unit tON Turn on time (from INn pin or bit to VOUT = 10% VBATT) RL = 50 Ω, VBATT = 14 V, Active or limp-home mode 7 15 35 µs tOFF Turn off time (from INn pin or bit to VOUT = 90% VBATT) RL = 50 Ω, VBATT = 14 V, Active or limp-home mode 4 40 µs dV/dtON Turn on slew rate VDS = 70% to 30% VBATT RL = 50 Ω, VBATT = 14 V, Active or limp-home mode 0.35 1 2.2 V/µs dV/dtOFF Turn off slew rate VDS = 30% to 70% VBATT RL = 50 Ω, VBATT = 14 V, Active or limp-home mode 0.15 1.3 3.4 V/µs dV/dtOFF Turn off slew rate VDS = 30% to 70% VBATT gate kill condition RL = 50 Ω, VBATT = 14 V, Active or limp-home mode 12 35 V/µs tINRUSH Bulb inrush mode restart time Active mode covered by SCAN 29 40 51 µs tBIM Bulb inrush mode reset time Active mode covered by SCAN 29 41 55 ms PWM generator fINT Internal reference frequency 8 MHz fINT(VAR) Internal reference frequency variation -15 15 % fINT(VAR_3V) Internal reference frequency variation when VBATT=VDDIO=3V -15 22 % Note: All the digital filtering times reported in Table 14 are to be considered without spread spectrum. L9800 Power stages DS14041 - Rev 2 page 33/55 |
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