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L99PM72PXP データシート(PDF) 72 Page - STMicroelectronics

部品番号 L99PM72PXP
部品情報  Advanced power management system IC with embedded LIN and high speed CAN transceiver supporting CAN Partial Networking
PDF  128 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L99PM72PXP データシート(HTML) 72 Page - STMicroelectronics

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Electrical specifications
L99PM72PXP
72/128
Doc ID 023553 Rev 3
The voltages are referred to ground and currents are assumed positive, when the current
flows into the pin. 6 V < VS < 18 V; 4.8 V < V1 < 5.2 V; all outputs open; Tj = -40°C to 130°C,
unless otherwise specified
5.5.15
Inputs TxDC and TxDL for Flash Mode
6V
 V
S  18 V; 4.5 V  V1  5.3 V; Tj = -40°C to 130°C; voltages are referred to PGND, all
outputs open
Figure 34.
SPI - transfer timing diagram
The SPI can be driven by a micro controller with its SPI peripheral running in following
mode: CPOL = 0 and CPHA = 0.
For this mode input data is sampled by the low to high transition of the clock CLK, and
output data is changed from the high to low transition of CLK.
Table 42.
RXDL/NINT, RXDC/NINT timing
Symbol
Parameter
Test condition
Min.
Typ.
Max.
Unit
tInterupt
Interrupt pulse duration
—
56
—
µs
Table 43.
Inputs: TxDC and TxDL for Flash Mode
Symbol
Parameter
Test condition
Min.
Typ.
Max.
Unit
VflashL
Input low level (VTXDC/L for
exit from Flash Mode)
V1 = 5 V
7.1
8.4
9.0
V
VflashH
Input high level (VTXDC/L for
transition into Flash Mode)
V1 = 5 V
8.3
9.4
10.0
V
VflashHYS
Input voltage hysteresis
V1 = 5 V
0.8
1.0
1.2
V



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