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L9907 データシート(PDF) 34 Page - STMicroelectronics |
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L9907 データシート(HTML) 34 Page - STMicroelectronics |
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34 / 49 page ![]() SPI operation L9907 34/49 DS11800 Rev 5 The Power Up default value for this parameter is "10", corresponding to Vcc = 3.3 V applications. A SPI command attempting to set a not allowed VCCOV configuration does not return any SPI error, and the VCCOV configuration register retains its previous value. 3. CMD2 register - Test Mode Selections: B(15:13) = 010 a) SDI bit B12: GCR_INT_I This bit is accessible for writing only if AND(EN1,EN2)='0': trying to write it without lowering AND(EN1,EN2) will not generate any SPI error but command will be simply ignored for the specific bit. Once written, CMD2 B12 changes the status of the output GCR_INT_I (refer to Section 2.5.1). b) SDI bit B9: BstDisEN This bit is accessible for writing only if AND(EN1,EN2)='0': trying to write it without lowering AND(EN1,EN2) will not generate any SPI error but command will be simply ignored for the specific bit. Once written, CMD2 B9 determines how to behave in case of activation of BST_DIS pin. In case this bit is set and activating BST_DIS pin brings the device to switch-off BST_CLK till BST_DIS pin becomes low (refer to Section 2.4.1). c) SDI bit B8: SHT_PH This bit is accessible for writing only if AND(EN1,EN2)='0': trying to write it without lowering AND(EN1,EN2) will not generate any SPI error but command will be simply ignored for the specific bit. Once written, CMD2 B8 determines how to behave in case of shoot-through detected. In case this bit is not set (default) a shoot-through in any phase will prevent the actuation of all commands, only the involved phase is inhibited otherwise (refer to Section 2.5.2). d) VSCTST (B7) = '1' activates Test Function for short circuit level ('0' is the default value). e) VOVTST (B6) = '1' activates Test Function for VCC over-voltage level ('0' is the default value). f) SDI bit B5: Short_PH This bit is accessible for writing only if AND(EN1,EN2)='0': trying to write it without lowering AND(EN1,EN2) will not generate any SPI error but command will be simply ignored for the specific bit. Once written, CMD2 B5 determines how to behave in case of external FET (both HS and LS) short detected. In case this bit is not set (default) a short in any phase will prevent the actuation of all commands, only the involved phase is inhibited otherwise (refer to Section 2.5.3). Not Allowed 0 0 Not Allowed 1 1 Table 33. VCC over voltage threshold (continued) VCCOV B1 = VCCOV2 B0 = VCCOV1 |
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