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L9907 データシート(PDF) 36 Page - STMicroelectronics |
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L9907 データシート(HTML) 36 Page - STMicroelectronics |
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36 / 49 page ![]() SPI operation L9907 36/49 DS11800 Rev 5 If EN1 and EN2 are both asserted while a SPI cycle CMD4 or CMD1 with WE=1 is ongoing, then a SPI communication error is generated and the corresponding SPI command is ignored. The effect of any fault (except Shoot Through) can be selectively masked from Micro Controller setting at '0' proper register. FS_FLAG status and SDO report are not affected since fault detection always acts in the same way. Default value for these bits is '1' (fault effect enabled). Once the fault effect is re-enabled with SPI communication the IC reacts to fault as described in the specific paragraph if the fault is still present. 6. CMD4 SPI command register SDI bit B12: REGOFF_EN This bit is accessible for writing only if AND(EN1,EN2)='0': trying to write it without lowering AND(EN1,EN2) will generate SPI error. Once written, CMD4 B12 determines if the REG_OFF procedure is active or not (default: not active). 7. REG_OFF procedure (active only if CMD4 B12 is set; refer also to Section 2.3) Lowering EN1 external pin triggers the procedure to switch off regulators that supply the HS and LS FET drivers: filter time, active only on the falling edge of the EN1 signal, is implemented: 8*tosc TFILT 16*tosc. Once the procedure has been triggered, the device behaves as follows: REG_OFF = '1', EN_PWM = "000", FS_FLAG = '0', DIAG2 bit B6 set In order to re-engage, the correct procedure is to toggle AND(EN1,EN2) then read the DIAG2 SPI register (to verify that bit B6 is set). Toggling of AND(EN1,EN2) will re-engage the output commands (EN_PWM = "111") while subsequent reading of DIAG2 register will re-engage HS/LS drivers supply (REG_OFF = '0') and release FS_FLAG. In order to avoid activating output commands while regulators that supply the HS and LS FET drivers are in power-up phase (this could generate current shape distortion) Table 35. CMD4 SDI SPI bits vs. enabled fault CMD4 SDI SPI BIT Name Description (Default value=’1’) B9 EN_VccOV It enables VCCOV fault effect in case of VCCOV fault detection B8 EN_VccUV It enables VCCUV fault effect in case of VCCUV fault detection B7 EN_UV_HS It enables UV_HS fault effect in case of UV_HS fault detection B6 EN_UV_LS It enables UV_LS fault effect in case of UV_LS fault detection B5 EN_VSCHS1 It enables VSCHS1 fault effect in case of VSCHS1 fault detection B4 EN_VSCHS2 It enables VSCHS2 fault effect in case of VSCHS2 fault detection B3 EN_VSCHS3 It enables VSCHS3 fault effect in case of VSCHS3 fault detection B2 EN_VSCLS1 It enables VSCLS1 fault effect in case of VSCLS1 fault detection B1 EN_VSCLS2 It enables VSCLS2 fault effect in case of VSCLS2 fault detection B0 EN_VSCLS3 It enables VSCLS3 fault effect in case of VSCLS3 fault detection |
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