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STM32H533CE データシート(PDF) 24 Page - STMicroelectronics |
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STM32H533CE データシート(HTML) 24 Page - STMicroelectronics |
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24 / 231 page  Functional overview STM32H533xx 24/231 DS14539 Rev 1 When TrustZone is enabled (TZEN=0xB4), the boot space must be in secure area. The SECBOOTADD0[24:0] option bytes are used to select the boot secure memory address. A unique boot entry option can be selected by setting the SECBOOT_LOCK option bit. 3.8 Global TrustZone controller (GTZC) GTZC is used to configure TrustZone and privileged attributes within the full system. The GTZC includes three different sub-blocks: • TZSC: TrustZone security controller This sub-block defines the secure/privilege state of slave/master peripherals. It also controls the non-secure area size for the watermark memory peripheral controller Table 3. STM32H533xx boot mode when TrustZone is disabled (TZEN = 0xC3) PRODUCT_STATE BOOT0 pin BOOT_UBE FLASH_OP TSR[29:22] Boot address option-byte selection Boot area ST programmed default value Open 0 NA NSBOOTADD[31:8] Boot address defined by user option byte NSBOOTADD[31:8] Flash: 0x0800 0000 1 NA NA Bootloader Bootloader Provisioning x NA NA RSS RSS Provisioned, Closed, Locked x NA NSBOOTADD[31:8] Boot address defined by user option byte NSBOOTADD[31:8] Flash: 0x0800 0000 Table 4. STM32H533xx boot mode when TrustZone is enabled (TZEN = 0xB4) PRODUCT_STATE BOOT0 pin BOOT_UBE FLASH_OP TSR[29:22] Boot address option-byte selection Boot area ST programmed default value Open 0 x SECBOOTADD [31:8] Boot address defined by user option byte SECBOOTADD[31:8] Flash: 0x0C00 0000 - 1 0xB4 NA Bootloader Bootloader - 1 0xC3 NA ST-iROT ST-iROT Provisioning x NA NA RSS RSS Provisioned, TZ_Closed, Closed, Locked x x 0xC3 ST-iROT ST-iROT ST-iROT 0xB4 SECBOOTADD [31:8] Boot address defined by user option byte SECBOOTADD[31:8] Flash: 0x0C00 0000 |
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