STM32H533CE datasheet(37/231 Pages) STMICROELECTRONICS

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DS14539 Rev 1

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STM32H533xx

Functional overview

–

Can be either configured as fully secure or fully non-secure using the TZSC

MPCWM3 controller

The FMC registers can be configured as secure through the TZSC controller.

3.20

Octo-SPI interface (OCTOSPI)

The OCTOSPI supports most external serial memories such as serial PSRAMs, serial

NAND and serial NOR flash memories, HyperRAMs™ and HyperFlash™ memories, with

the following functional modes:

•

Indirect mode: all the operations are performed using the OCTOSPI registers.

•

Status-polling mode: the external memory status register is periodically read and an

interrupt can be generated in case of flag setting.

•

Memory-mapped mode: the external memory is memory mapped and is seen by the

system as if it were an internal memory supporting read and write operation.

The OCTOSPI supports the following protocols with associated frame formats:

•

the standard frame format with the command, address, alternate byte, dummy cycles

and data phase

•

the HyperBus™ frame format

The OCTOSPI offers the following features:

•

Three functional modes: Indirect, Status-polling, and Memory-mapped

•

Read and write support in Memory-mapped mode

•

Supports for single, dual, quad and octal communication

•

Dual-quad mode, where eight bits can be sent/received simultaneously by accessing

two quad memories in parallel.

•

SDR (single-data rate) and DTR (double-transfer rate) support

•

Data strobe support

•

Fully programmable opcode

•

Fully programmable frame format

•

HyperBus support

•

Integrated FIFO for reception and transmission

•

8-, 16-, and 32-bit data accesses allowed

•

DMA channel for Indirect mode operations

•

Interrupt generation on FIFO threshold, timeout, operation complete, and access error

3.20.1

OCTOSPI TrustZone security

When the TrustZone security is enabled, the whole OCTOSPI bank is secure after reset.

Up to two non-secure area can be configured thought the TZSC MPCWM1 controller with a

granularity of 64 Kbytes.

The OCTOSPI registers can be configured as secure through the TZSC controller.

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