CHR71000 datasheet(31/54 Pages) AMSOSRAM

部品番号	CHR71000

部品情報	CHR71000 High resolution 70 MP CMOS image sensor

PDF	54 Pages

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メーカー	AMSOSRAM [ams-OSRAM AG]

ホームページ	https://ams-osram.com/

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CHR71000

Functional description

Datasheet • PUBLIC • Document Feedback

DS000427 • v2-01 • 2026-Mar-18

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The length of the ROT is (T1+T2+T3+2*(T4+T5+T6+T8)+T9+T10+T11+T12+T13+4). With the

default values, the ROT length is 168 clock cycles, or 5.56 µs. The read out will start after this

ROT (4 clock pulses after sync_x rising edge).

The ROT timing can be configured further with the following registers:

•

With the register reg_pol, the polarity of all outputs can be set. To achieve the timing as in

previous figure, the reg_pol bit for every signal should be '1'. The signal can be inverted by

changing the register bit to '0'. Next table shows which register bit maps to which signal.

Table 10: Reg_pol description

Reg_pol

Output

[0]

imc_sync_x

[1]

imc_clk_y

[2]

imc_sync_y_read

[3]

imc_sync_y_inte

[4]

imc_pix_transfer

[5]

imc_pix_reset

[6]

imc_pix_select

[7]

imc_col_sample

[8]

imc_col_sample_r

[9]

imc_col_sample_s

[10]

imc_col_init

[11]

imc_col_precharge

[12]

imc_col_enable

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