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ST40RA データシート(PDF) 74 Page - STMicroelectronics

部品番号 ST40RA
部品情報  32-bit Embedded SuperH Device
PDF  94 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST40RA データシート(HTML) 74 Page - STMicroelectronics

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ADCS 7260755H
STMicroelectronics
74/94
ST40RA
8 Pin description
EMI system pins
EADDR[2:26]A
O
Z
I/O
ZZZE740
(Mode 0)
0
EDATA[0:31]
I/O
Z
I/O
Z
ECLKOUT, MCLKOUT,
FCLKOUT
O0
O
0
ECLKEN
O
Z
O
Z
1
EDQM[0:3]
O
Z
O
Z
1111
NOTECS[0:5]
O
1
I/O
Z
111111
NOTERAS, NOTECAS,
NOTEWE
I/O
1
I/O
Z
1
EWAIT
I/O
Z
I/O
Z
EPENDING
O
I
0 (MD7 = 0)
Z (MD7 = 1)
I/O
MD7
= 0
Z0
NOTMREQ
(EMI_HOLD_ACK when EMI
slave)
I-
I
Z
NOTMACK
(EMI_HOLD_REQ when EMI
slave)
OZ
OZ
1
NOTFBAA
OZ
OZ
1
NOTESCS[0:2]
O
Z
I/O
Z
a. The reset state of the EADDR bus is tri-state, the value given corresponds to a specific boot mode
and shows the expected ties.
Pin names
Architecturally defined
reset state
Implementation reset state during and after
reset
Dir
During reset
Dir
During reset
Following reset
Table 36: Pin reset states for ST40RA



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