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ST40RA データシート(PDF) 24 Page - STMicroelectronics

部品番号 ST40RA
部品情報  32-bit Embedded SuperH Device
PDF  94 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST40RA データシート(HTML) 24 Page - STMicroelectronics

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ST40RA
5 System configuration
5.9.1
EMI.GENCFG EMI general configuration
EMI.GENCFG
EMI general configuration
0x0028
The EMI provides a generic register to allow the configuration of the padlogic. ST40RA
uses the bits detailed.
0SOFE
Strobe positioning
Strobe on falling edge:
0: Disabled
1: Enabled
Reset: 0
RW
[5:1]
SDPOS
SDRAM bank location
00001: Bank 0
00010: Bank 1
00011: Bank 2
00100: Bank 3
00101: Bank 4
00110: Bank 5
10001: Bank 0 to 1
10010: Bank 0 to 2
10011: Bank 0 to 3
10100: Bank 0 to 4
10101: Bank 0 to 5
10110: Bank 1 to 2
10111: Bank 1 to 3
11000: Bank 1 to 4
11001: Bank 1 to 5
11010: Bank 2 to 3
11011: Bank 2 to 4
11100: Bank 2 to 5
11101: Bank 3 to 4
11110: Bank 3 to 5
11111: Bank 4 to 5
Reset: 0
RW
6EWPU
Pull-up on EWAIT pina
0: Disabled
1: Enabled
Reset: 0
a. If the EWAIT signal is set at the beginning of an access, and the data is to be set after the EWAIT
is cleared, the parameters ACCESSTIMEREAD and LATCHPOINT in the EMI configuration
registers must be set as follows:
ACCESSTIME > LATCHPOINT + 3.
See the
ST40 System Architecture Manual, Volume 2: Bus Interfaces for details of setting the EMI
configuration registers.
RW
7
EAPU
Pull-up enable on EADDR pins
0: Disabled
1: Enabled
Reset: 0
RW
[31:8]
Reserved
0: Ignored
1: Reserved
Reset: Undefined



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