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ST6369 データシート(PDF) 39 Page - STMicroelectronics |
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ST6369 データシート(HTML) 39 Page - STMicroelectronics |
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39 / 71 page ![]() Figure 44. S-BUS Timing Diagram SERIAL PERIPHERAL INTERFACE (Continued) S-BUS/I 2CBUS Timing Diagrams The clock of the S-BUS/I 2CBUS of the ST6369 SPI (single master only) has a fixed bus clock fre- quency of 62.5KHz. All the devices connected to the bus must be able to follow transfers with fre- quencies up to 62.5KHz, either by being able to transmit or receive at that speed or by applying the clock synchronization procedure which will force the master into a wait state and stretch low peri- ods. ® ST6369 35/67 |
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