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M32C/8B データシート(PDF) 228 Page - Renesas Technology Corp |
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M32C/8B データシート(HTML) 228 Page - Renesas Technology Corp |
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228 / 406 page  Under development M32C/8B Group 17. Serial Interfaces Preliminary specification Specifications in this manual are tentative and subject to change. REJ09B0450-0050 Rev.0.50 Oct 31, 2008 Page 211 of 385 Figure 17.13 Receive Operations when External Clock is Selected D6 D7 D7 TE bit in the UiC1 register i = 0 to 4 fEXT = external clock frequency The above applies under the following conditions: - UiMR register: CKDIR bit = 1 (external clock) - UiC0 reigster: CRD bit = 1 (CTS function disabled) CKPOL bit = 0 (receive data input at the rising edge of the serial clock) NOTE: 1. Satisfy the following conditions, while the CLKi pin input is "H" before the data receive operation. - UiC1 register: TE bit = 1 (transmit operation enabled) RE bit = 1 (receive operation enabled) - Write dummy data to the UiTB register TI bit in the UiC1 register Write dummy data to UiTB register RTSi output CLKi input(1) RXDi input RI bit in the UiC1 register IR bit in the SiRIC register Set to 0 by an interrupt request acknowledgement or by a program RE bit in the UiC1 register 1 0 OER bit in the UiRB register 1 fEXT D0 D1 D2 D3 D4 D5 D6 D0 D1 D2 D3 D4 D5 D6 D0 D1 D2 D3 D4 D5 D7 Transfer data from UiTB register to UARTi transmit shift register Becomes "L" by reading UiRB register Transfer data from UARTi receive shift register to UiRB register A read from UiRB register 1 0 1 0 1 0 1 0 1 0 “L” “H” “L” “H” “L” “H” |
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