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H8S2245 データシート(PDF) 174 Page - Renesas Technology Corp |
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H8S2245 データシート(HTML) 174 Page - Renesas Technology Corp |
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174 / 818 page ![]() Section 6 Bus Controller Rev.3.00 Mar. 26, 2007 Page 132 of 772 REJ09B0355-0300 6.1.2 Block Diagram Figure 6.1 shows a block diagram of the bus controller. Area decoder Bus controller ABWCR ASTCR BCRH BCRL Internal address bus CS0 to CS3 External bus control signals Legend: ABWCR: Bus width control register ASTCR: Access state control register WCRH: Wait control register H WCRL: Wait control register L BCRH: Bus control register H BCRL: Bus control register L BREQ BACK BREQO Internal control signals Wait controller WCRH WCRL Bus mode signal Bus arbiter CPU bus request signal DTC bus request signal CPU bus acknowledge signal DTC bus acknowledge signal WAIT Figure 6.1 Block Diagram of Bus Controller |
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