SH7052 datasheet(405/919 Pages) RENESAS

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SH7052 データシート(PDF) 405 Page - Renesas Technology Corp

部品番号	SH7052

部品情報	SuperHTM RISC engine

PDF	919 Pages

Scroll/Zoom	100%

メーカー	RENESAS [Renesas Technology Corp]

ホームページ	http://www.renesas.com

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Sample Setup Procedure for Interval Timer Operation: An example of the setup procedure for

interval timer operation is shown in figure 10.58.

1. Set the first-stage counter clock ø' in prescaler register 1 (PSCR1).

2. Set the ITVE bit to be used in the interval interrupt request register (ITVRR) to 1. An interrupt

request can be sent to the CPU when the corresponding bit changes to 1 in the channel 0 free-

running counter (TCNT0).

To start A/D converter sampling, set the ITVA bit to be used in ITVRR to 1.

3. Set bit 0 to 1 in the timer start register (TSTR) to start TCNT0.

Select counter clock

Set interval

Start counter

Interrupt request to CPU

or start of A/D0 sampling

Start

Figure 10.58 Sample Setup Procedure for Interval Timer Operation

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