LTC2926IGN datasheet(15/28 Pages) LINER

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LTC2926

2926fa

through the power good timeout period, a fault and retry

will subsequently occur.

To ensure a consistent power good timeout period, the

LTC2926 requires the PGTMR pin voltage to fall below 0.1V

for the fault latch reset to complete. The ON pin needs to be

held low for only 10µs to initiate fault reset; it is allowed to

go high while the timing capacitor on PGTMR discharges

to 0.1V (see Functional Block Diagram).

When a resistive voltage divider drives the ON and FAULT

pins together, include the contribution of IFAULT(UP) when

choosing the resistor values (Figure 10a). When a logic

output drives both pins, up to 30k

Ω of series resistance

may be added to limit the output current while the fault

pull-down is active (Figure 10b).

Automatic Remote Sense Switching

The LTC2926 provides integrated remote sense switches

that solve the problem of voltage drops in the external series

MOSFETs that control supply ramping. A switch creates

a feedback path from a slave supply output to the slave

supply generator sense input that allows the generator

to compensate for the I • R drop across the controlling

MOSFET (see, for example, Figure 6). After the supply

ramping is complete, but before the internal pull-down

releases the STATUS/PGI pin, the two integrated remote

sense switches are closed.

For applications that require more than two remote sense

switches, connect the RSGATE pin to the gates of additional

external N-channel MOSFETs. An internal charge pump

guarantees that RSGATE will reach VCC + 5.5V, which al-

lows full enhancement of logic-level MOSFETs with source

or drain voltages up to VCC.

The switches are open when supply ramping has not

completed to avoid creating a power path between the

supply generator and the load. When the remote sense

switches are open, the supply generator’s sense input must

be connected locally to its output through a resistor that

is much larger than the remote sense switch resistance

of 10

Ω (max); a 100Ω resistor is adequate for most ap-

plications as in Figure 7.

Some supply modules have built-in resistors of 10

Ω or

less between their out and sense pins, which may require

a lower switch resistance. Choose an external N-channel

MOSFET with an RDS(on) that is at most 1/10 the module

out-to-sense resistance, but that is still much larger than

the RDS(on) of the power path MOSFET.

If neither external remote sense switches nor a sta-

tus activation delay is required, leave the RSGATE pin

unconnected.

APPLICATIO S I FOR ATIO

Figure 10. Fault Retry Conﬁgurations, (a) Resistive Voltage

Divider and (b) Logic Driven

RONB

RONA

LTC2926

GND

VCC

FAULT

VIN

VON

FAULT LATCH

VCC

IFAULT(UP)

RSERIES

LIMIT IOUT WITH RSERIES

RSERIES ≤ 30kΩ

IOUT

2926 F10

LTC2926

GND

VCC

FAULT

VIN

FAULT LATCH

VCC

IFAULT(UP)

(a)

(b)

VON =

• VIN

RONA

RONA + RONB

+ (RONA || RONB) • IFAULT(UP)

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