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LTC2926IGN データシート(PDF) 18 Page - Linear Technology |
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LTC2926IGN データシート(HTML) 18 Page - Linear Technology |
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18 / 28 page  LTC2926 18 2926fa NC RTB1 15.0k RTA1 9.53k 2926 F14 LTC2926 S1 FB1 RAMPBUF TRACK1 TRACK2 GND PGTMR VIN RTB2 15.0k RTA2 5.76k FAULT 10k CPGTMR 1 µF CMGATE 0.1 µF MGATE 0.1 µF 10 Ω VCC RAMP VIN STATUS STATUS/PGI ON ON/OFF RSGATE 10k 3.3V VIN Q0 IRF7413Z SGATE2 10 Ω Q2 IRF7413Z SGATE1 10 Ω 3.3V MASTER D1 RFB1 15.0k RFA1 9.53k S2 FB2 D2 RFB2 15.0k RFA2 5.76k FAULT OUT IN SENSE RX1 100 Ω 1.8V MODULE 3.3V Q1 IRF7413Z 1.8V SLAVE1 OUT IN SENSE RX2 100 Ω 2.5V MODULE 3.3V 2.5V SLAVE2 Figure 14. Coincident Tracking Example before the master ramp reaches its final value; otherwise, the slave supply voltage will be held below its intended level. Calculate the upper track resistor, RTB, from: RR S S TB FB M S =• ⎛ ⎝⎜ ⎞ ⎠⎟ (4) Choose a voltage difference between the master and slave ramps, ΔV, if offset tracking is desired. If a time delay is desired for supply sequencing, calculate an effective volt- age difference based on the master ramp rate. If neither voltage offset nor time delay is required, set ΔV = 0V. ΔV = a voltage difference (offset tracking), or (5a) ΔV = SM • tDLY (supply sequencing), or (5b) ΔV = 0V (coincident/ratiometric tracking) (5c) Use the following formula to determine the lower track resistors, RTA, using the TRACK pin voltage, VTRACK, and the FB pin internal reference voltage, VFB(REF), both from the Electrical Characteristics: R V V R V R V R TA TRACK FB REF FB FB REF FA TRACK TB = +− () () ++ ∆ V RTB (6) Note that large ratios of slave ramp rate to master ramp rate, SS/SM, may result in negative values for RTA. In such cases increase the offset or delay, or reduce the slave ramp rate to realize positive values of RTA. APPLICATIO S I FOR ATIO Figure 13. Coincident Tracking Waveforms from Figure 14 Circuit Coincident Tracking Example A typical three-supply application is shown in Figure 14. The master signal is 3.3V, the slave 1 supply is a 1.8V module, and the slave 2 supply is a 2.5V module. Allow for ±10% tolerance of the slave supply voltages. Both slave supplies track coincidently with the 3.3V master supply that is controlled by an external MOSFET. The ramp rate of the supplies is 100V/s. The slave supplies’ minimum load resistances are 150 Ω.Theexternalconfigurationresistors 500mV/DIV MASTER SLAVE2 SLAVE1 5ms/DIV 2926 F13 500mV/DIV 5ms/DIV |
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