データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

MFRC522 データシート(PDF) 44 Page - NXP Semiconductors

部品番号 MFRC522
部品情報  Contactless reader IC
PDF  96 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  NXP [NXP Semiconductors]
ホームページ  http://www.nxp.com
Logo NXP - NXP Semiconductors

MFRC522 データシート(HTML) 44 Page - NXP Semiconductors

Back Button MFRC522 Datasheet HTML 40Page - NXP Semiconductors MFRC522 Datasheet HTML 41Page - NXP Semiconductors MFRC522 Datasheet HTML 42Page - NXP Semiconductors MFRC522 Datasheet HTML 43Page - NXP Semiconductors MFRC522 Datasheet HTML 44Page - NXP Semiconductors MFRC522 Datasheet HTML 45Page - NXP Semiconductors MFRC522 Datasheet HTML 46Page - NXP Semiconductors MFRC522 Datasheet HTML 47Page - NXP Semiconductors MFRC522 Datasheet HTML 48Page - NXP Semiconductors Next Button
Zoom Inzoom in Zoom Outzoom out
 44 / 96 page
background image
MFRC522_33
© NXP B.V. 2009. All rights reserved.
Product data sheet
PUBLIC
Rev. 3 — 26 October 2009
112133
44 of 96
NXP Semiconductors
MFRC522
Contactless reader IC
9.3.1.14
BitFramingReg register
Adjustments for bit-oriented frames.
9.3.1.15
CollReg register
Defines the first bit-collision detected on the RF interface.
Table 47.
BitFramingReg register (address 0Dh); reset value: 00h bit allocation
Bit
7
6
5
4
3
2
1
0
Symbol
StartSend
RxAlign[2:0]
reserved
TxLastBits[2:0]
Access
W
R/W
-
R/W
Table 48.
BitFramingReg register bit descriptions
Bit
Symbol
Value Description
7
StartSend
1
starts the transmission of data
only valid in combination with the Transceive command
6 to 4
RxAlign[2:0]
used for reception of bit-oriented frames: defines the bit
position for the first bit received to be stored in the FIFO buffer
example:
0
LSB of the received bit is stored at bit position 0, the second
received bit is stored at bit position 1
1
LSB of the received bit is stored at bit position 1, the second
received bit is stored at bit position 2
7
LSB of the received bit is stored at bit position 7, the second
received bit is stored in the next byte that follows at bit
position 0
These bits are only to be used for bitwise anticollision at
106 kBd, for all other modes they are set to 0
3
reserved
-
reserved for future use
2 to 0
TxLastBits[2:0]
-
used for transmission of bit oriented frames: defines the
number of bits of the last byte that will be transmitted
000b indicates that all bits of the last byte will be transmitted
Table 49.
CollReg register (address 0Eh); reset value: xxh bit allocation
Bit
7
6
5
4
3
2
1
0
Symbol
ValuesAfterColl
reserved
CollPosNotValid
CollPos[4:0]
Access
R/W
-
R
R
Table 50.
CollReg register bit descriptions
Bit
Symbol
Value Description
7
ValuesAfterColl
0
all received bits will be cleared after a collision
only used during bitwise anticollision at 106 kBd,
otherwise it is set to logic 1
6
reserved
-
reserved for future use
5
CollPosNotValid
1
no collision detected or the position of the collision is
out of the range of CollPos[4:0]



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com