データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

Preview PDF HTML

MFRC522 データシート(PDF) 53 Page - NXP Semiconductors

部品番号 MFRC522
部品情報  Contactless reader IC
PDF  96 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  NXP [NXP Semiconductors]
ホームページ  http://www.nxp.com
Logo NXP - NXP Semiconductors

MFRC522 データシート(HTML) 53 Page - NXP Semiconductors

Back Button MFRC522 Datasheet HTML 49Page - NXP Semiconductors MFRC522 Datasheet HTML 50Page - NXP Semiconductors MFRC522 Datasheet HTML 51Page - NXP Semiconductors MFRC522 Datasheet HTML 52Page - NXP Semiconductors MFRC522 Datasheet HTML 53Page - NXP Semiconductors MFRC522 Datasheet HTML 54Page - NXP Semiconductors MFRC522 Datasheet HTML 55Page - NXP Semiconductors MFRC522 Datasheet HTML 56Page - NXP Semiconductors MFRC522 Datasheet HTML 57Page - NXP Semiconductors Next Button
Zoom Inzoom in Zoom Outzoom out
 53 / 96 page
background image
MFRC522_33
© NXP B.V. 2009. All rights reserved.
Product data sheet
PUBLIC
Rev. 3 — 26 October 2009
112133
53 of 96
NXP Semiconductors
MFRC522
Contactless reader IC
9.3.2.14
MfRxReg register
9.3.2.15
Reserved register 1Eh
Functionality is reserved for future use.
9.3.2.16
SerialSpeedReg register
Selects the speed of the serial UART interface.
Table 79.
MfRxReg register (address 1Dh); reset value: 00h bit allocation
Bit
7
6
5
4
3
2
1
0
Symbol
reserved
ParityDisable
reserved
Access
-
R/W
-
Table 80.
MfRxReg register bit descriptions
Bit
Symbol
Value Description
7 to 5 reserved
-
reserved for future use
4
ParityDisable 1
generation of the parity bit for transmission and the parity check for
receiving is switched off
the received parity bit is handled like a data bit
3 to 0 reserved
-
reserved for future use
Table 81.
Reserved register (address 1Eh); reset value: 00h bit allocation
Bit
7
6
5
4
3
2
1
0
Symbol
reserved
Access
-
Table 82.
Reserved register bit descriptions
Bit
Symbol
Description
7 to 0
reserved
reserved for future use
Table 83.
SerialSpeedReg register (address 1Fh); reset value: EBh bit allocation
Bit
7
6
5
4
3
2
1
0
Symbol
BR_T0[2:0]
BR_T1[4:0]
Access
R/W
R/W
Table 84.
SerialSpeedReg register bit descriptions
Bit
Symbol
Description
7 to 5
BR_T0[2:0]
factor BR_T0 adjusts the transfer speed: for description, see
Section 8.1.3.2 on page 11
4 to 0
BR_T1[4:0]
factor BR_T1 adjusts the transfer speed: for description, see
Section 8.1.3.2 on page 11



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか？  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com