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ATmega16HVB データシート(PDF) 42 Page - ATMEL Corporation |
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ATmega16HVB データシート(HTML) 42 Page - ATMEL Corporation |
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42 / 273 page ![]() 42 8042A–AVR–07/09 ATmega16HVB/32HVB 11. System Control and Reset 11.1 Resetting the AVR During reset, all I/O Registers are set to their initial values, and the program starts execution from the Reset Vector. The instruction placed at the Reset Vector must be a JMP – Absolute Jump – instruction to the reset handling routine. If the program never enables an interrupt source, the Interrupt Vectors are not used, and regular program code can be placed at these locations. The circuit diagram in ”Reset Logic” on page 43 shows the reset logic. Table 12-1 on page 52 defines the electrical parameters of the reset circuitry. The I/O ports of the AVR are immediately reset to their initial state when a reset source goes active. This does not require any clock source to be running. After all reset sources have gone inactive, a delay counter is invoked, stretching the internal reset. This allows the voltage regulator to reach a stable level before normal operation starts. The time-out period of the delay counter is defined by the user through the SUT Fuses. The dif- ferent selections for the delay period are presented in ”Clock Sources” on page 26. 11.2 Reset Sources The ATmega16HVB/32HVB has five sources of reset: • The Power-on Reset module generates a Power-on Reset when the Voltage Regulator starts up. • External Reset. The MCU is reset when a low level is present on the RESET pin for longer than the minimum pulse length. • Watchdog Reset. The MCU is reset when the Watchdog Timer period expires and the Watchdog is enabled. • Brown-out Reset. The MCU is reset when V REG is below the Brown-out Reset Threshold, VBOT. See “Brown-out Detection” on page 45. • debugWIRE Reset. In On-chip Debug mode, the debugWIRE resets the MCU when giving the Reset command. |
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