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HCS12 データシート(PDF) 21 Page - Freescale Semiconductor, Inc |
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HCS12 データシート(HTML) 21 Page - Freescale Semiconductor, Inc |
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21 / 452 page  S12CPUV2 Reference Manual, Rev. 4.0 Freescale Semiconductor 21 2.1 Introduction This section describes the CPU12 programming model, register set, the data types used, and basic memory organization. 2.2 Programming Model The CPU12 programming model, shown in Figure 2-1, is the same as that of the M68HC11 CPU. The CPU has two 8-bit general-purpose accumulators (A and B) that can be concatenated into a single 16-bit accumulator (D) for certain instructions. It also has: • Two index registers (X and Y) • 16-bit stack pointer (SP) • 16-bit program counter (PC) • 8-bit condition code register (CCR) Figure 2-1. Programming Model Reference Manual — S12CPUV2 Section 2. Overview 7 15 15 15 15 15 D IX IY SP PC AB N SX H I Z V C 0 0 0 0 0 0 7 0 CONDITION CODE REGISTER 8-BIT ACCUMULATORS A AND B 16-BIT DOUBLE ACCUMULATOR D INDEX REGISTER X INDEX REGISTER Y STACK POINTER PROGRAM COUNTER OR |
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