ADT7481

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14

a stop condition. In read mode, the master device will

override the acknowledge bit by pulling the data line high

during the low period before the ninth clock pulse. This is

known as no acknowledge. The master will then take the

data line low during the low period before the tenth clock

pulse, then high during the tenth clock pulse to assert a stop

condition.

Any number of bytes of data may be transferred over the

serial bus in one operation, but it is not possible to mix read

and write in one operation because the type of operation is

determined at the beginning and cannot subsequently be

changed without starting a new operation. In the case of the

ADT7481, write operations contain either one or two bytes,

while read operations contain one byte.

To write data to one of the device data registers or to read

data from it, the address pointer register must be set so that

the correct data register is addressed. The first byte of a write

operation always contains a valid address that is stored in the

address pointer register. If data is to be written to the device,

the write operation contains a second data byte that is written

to the register selected by the address pointer register.

This procedure is illustrated in Figure 15. The device

address is sent over the bus followed by R/W set to 0 and

followed by two data bytes. The first data byte is the address

of the internal data register to be written to, which is stored

in the address pointer register. The second data byte is the

data to be written to the internal data register.

Figure 15. Writing a Register Address to the Address Pointer Register, then Writing Data to the Selected Register

D7

D6

D5

D4

D3

D2

D1

D0

FRAME 3

DATA

BYTE

ACK. BY

ADT7481

STOP BY

MASTER

SDA (CONTINUED)

SCL (CONTINUED)

FRAME 1 DATA

SERIAL BUS ADDRESS BYTE

ACK. BY

ADT7481

SDA

SCL

START BY

MASTER

FRAME 2

ADDRESS POINTER REGISTER BYTE

D7

D6

D5

D4

D3

D2

D1

D0

1

00

1

1

0

1

R/W

ACK. BY

ADT7481

1

1

9

9

1

9

Figure 16. Writing to the Address Pointer Register Only

FRAME 1 DATA

SERIAL BUS ADDRESS BYTE

ACK. BY

ADT7481

SDA

SCL

START BY

MASTER

FRAME 2

ADDRESS POINTER REGISTER BYTE

D7

D6

D5

D4

D3

D2

D1

D0

1

0

011

0

1

R/W

ACK. BY

ADT7481

1

1

9

9

STOP BY

MASTER

Figure 17. Reading from a Previously Selected Register

FRAME 1 DATA

SERIAL BUS ADDRESS BYTE

ACK. BY

ADT7481

SDA

SCL

START BY

MASTER

FRAME 2

ADDRESS POINTER REGISTER BYTE

D7

D6

D5

D4

D3

D2

D1

D0

1

0

0

1

1

0

1

R/W

ACK. BY

ADT7481

1

1

9

9

STOP BY

MASTER