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33810 データシート(PDF) 2 Page - Freescale Semiconductor, Inc |
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33810 データシート(HTML) 2 Page - Freescale Semiconductor, Inc |
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2 / 35 page  Analog Integrated Circuit Device Data 2 Freescale Semiconductor 33810 INTERNAL BLOCK DIAGRAM INTERNAL BLOCK DIAGRAM Gate Control Current Limit Temperature Limit Short/Open VPWR, VDD Oscillator DIN0 V2.5 VPWR DIN1 DIN2 DIN3 ~50 µA ~50 µA ~50 µA ~50 µA GIN0 GIN1 GIN2 GIN3 ~50 µA ~50 µA ~50 µA ~50 µA VDD ~5 0µA SPKDUR SO VDD SI SCLK CS ~50 µA VDD LOGIC CONTROL SPI OUTEN + RS lLimit VOC1 – Outputs 0 to 3 75 µA OUT1 OUT2 OUT3 NOMI Exposed Pad VDD ~50 µA VDD Bandgap MAXI + – SPI + – + – DAC DAC +− VPWR VOC GPGD Low V Clamp Clamp 100 µA GATE DRIVE CONTROL SPARK DURATION PARALLEL CONTROL PWM CONTROLLER NOMI,MAXI DAC SPARK DAC Under-voltage POR, Over-voltage V8.0 Analog V2.5 Logic Bias NOMI MAXI RSP RSN GD1 GD2 GD3 GD0 FB1 FB2 FB3 OUT0 + – SPI Open Secondary FB0 GND INTERFACE Exposed Pad ~15 µA ~15 µA Only GPGD Figure 2. 33810 Simplified Internal Block Diagram |
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