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TNETX15VE データシート(PDF) 51 Page - Texas Instruments

部品番号 TNETX15VE
部品情報  VLAN-ENGINE ADDRESS-LOOKUP DEVICE
PDF  113 Pages
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メーカー  TI1 [Texas Instruments]
ホームページ  http://www.ti.com
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TNETX15VE データシート(HTML) 51 Page - Texas Instruments

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TNETX15VE
VLAN-ENGINE ADDRESS-LOOKUP DEVICE
SPWS028B – APRIL 1997 – REVISED SEPTEMBER 1997
51
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
TNETX15VE DRAM and EAM interface
The TNETX15VE takes its frame input through the TNETX3150/TNETX3150A DRAM bus. It must recognize
a start-of-frame indication (SOF) on the first flag byte of the frame. After the SOF is found, the TNETX15VE
latches the first 32 bits of the destination address on the next DRAM cycle. From this time, it must complete a
lookup cycle, decide on the appropriate EAM code, and output this code in 440 ns, or less. Figure 2 shows the
lookup timing. Check the data set for the TNETX3150/TNETX3150A for field definitions beyond those used by
the TNETX15VE.
OSCIN
DOE
DWE
DRAS
DCAS
Row
Col
Col
Col
Col
Col
FPTR
Data
Col
Col
Col
Col
Col
Col
Col
Col
Col
Col
Col
Col
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
0PPP
01UU CCCC
00UU
1BBB
1SSS
CCCC
00UU
CCCC
CCCC
CCCC
CCCC
CCCC
00UU
00UU
00UU
00UU
DA7–DA0
DX2–DX0
DD31–
DD0
DD35–
DD32
EAM15–
EAM0
Forward Pointer Field
(Request Port Code)
High Nibble of
Start Flag (SOF)
Most-Significant 32 Bits of
Destination Address (DA) Latched
(Decode May Begin)
End-of-Buffer
(EOB)
External Address Match
(EAM) Code Valid
End-of-Flag
(EOF)
440 ns
0 ns
250 ns
500 ns
750 ns
Cycle
11
12
13
14
15
16
12
3
4
56
7
8
9
10
0
Figure 2. Lookup Cycle Timing
The data on each cycle has the following format. The TNETX15VE must determine that the data being written
to memory is the first buffer of a data frame and not an IOB index buffer. The buffer contains packet data if the
IOB bit is 0. The port number and VLAN assignment for the frame is latched from the channel code. The channel
code is the source port.



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