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TNETX15VE データシート(PDF) 16 Page - Texas Instruments

部品番号 TNETX15VE
部品情報  VLAN-ENGINE ADDRESS-LOOKUP DEVICE
PDF  113 Pages
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ホームページ  http://www.ti.com
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TNETX15VE データシート(HTML) 16 Page - Texas Instruments

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TNETX15VE
VLAN-ENGINE ADDRESS-LOOKUP DEVICE
SPWS028B – APRIL 1997 – REVISED SEPTEMBER 1997
16
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
internal register map (continued)
BYTE 3
BYTE 2
BYTE 1
BYTE 0
DIO ADDRESS
TagVLAN6/TagVLAN7
(see Notes 1 and 2)
TagVLAN4/TagVLAN5
(see Notes 1 and 2)
TagVLAN2/TagVLAN3
(see Notes 1 and 2)
TagVLAN0/TagVLAN1
(see Notes 1 and 2)
0x70
TagVLAN14/TagVLAN15
(see Notes 1 and 2)
TagVLAN12/TagVLAN13
(see Notes 1 and 2)
TagVLAN10/TagVLAN11
(see Notes 1 and 2)
TagVLAN8/TagVLAN9
(see Notes 1 and 2)
0x74
VLANID1 (see Note 1)
0x78
0x7C
VLANID2 (see Note 1)
0x80
0x84
VLANID3 (see Note 1)
0x88
0x8C
VLANID4 (see Note 1)
0x90
0x94
VLANID5 (see Note 1)
0x98
0x9C
VLANID6 (see Note 1)
0xA0
0xA4
VLANID7 (see Note 1)
0xA8
0xAC
VLANID8 (see Note 1)
0xB0
0xB4
VLANID9 (see Note 1)
0xB8
0xBC
VLANID10 (see Note 1)
0xC0
0xC4
VLANID11 (see Note 1)
0xC8
0xCC
VLANID12 (see Note 1)
0xD0
0xD4
VLANID13 (see Note 1)
0xD8
0xDC
VLANID14 (see Note 1)
0xE0
0xE4
0xE8
0xEC
Mirrorport
UPLINKport
0xF0
RXblock
TXblock
0xF4
CPUTX
0xF8
NOTES:
1. These registers are automatically loaded from the attached EEPROM when the LOAD bit in the control register is set or when the
TNETX15VE is hardware reset by either deasserting the RESET terminal or by setting DIO address high to 0x40.
2. Each byte contains two VLANIDs, one for each offset (x/y) specified in the name.



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