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AD9789BBCZ データシート(PDF) 3 Page - Analog Devices |
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AD9789BBCZ データシート(HTML) 3 Page - Analog Devices |
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3 / 76 page  AD9789 Rev. A | Page 3 of 76 DETAILED FUNCTIONAL BLOCK DIAGRAMS CLK CTL DATA- PATH 0 DATA- PATH 1 DATA- PATH 2 DATA- PATH 3 UP TO 32 BITS CMOS 0TO 15 LVDS RISE CMOS 16 TO 31 LVDS FALL UP TO 32 BITS UP TO 32 BITS UP TO 32 BITS 32 INPUT PINS P0 P1 FS DCO SUM SCALE BPF fC 4TO 32 BITS 16× INTERPOLATOR BPF fC = 0 TO fDAC/2 RETIMER LVDS/CMOS DATA FORMATTER/ ASSEMBLER Figure 2. Digital Signal Processing Functional Block Diagram BYPASS QAM INPUT SCALE 24-BIT NCO 0TO fDAC/16 2N (N = 0 TO 5) (P/Q = 0.5 TO 1) RATE CONVERTER P/Q 24-BIT CH GAIN 0× TO 2× SRRC 2 BYPASS SRRC QAM MAPPER Figure 3. Channel 0 Through Channel 3 Datapath Block Detail (I and Q Paths Are Identical So Only One Is Shown) |
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