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LT1956/LT1956-5

1956f

internal switch will ramp up VIN current into the diode in an

attempt to get it to recover. Then, when the diode has

finally turned off, some tens of nanoseconds later, the VSW

node voltage ramps up at an extremely high dV/dt, per-

haps 5 to even 10V/ns ! With real world lead inductances,

the VSW node can easily overshoot the VIN rail. This can

result in poor RFI behavior and if the overshoot is severe

enough, damage the IC itself.

The suggested catch diode (D1) is an International Recti-

fier 10MQ060N Schottky. It is rated at 1.5A average

forward current and 60V reverse voltage. Typical forward

voltage is 0.63V at 1A. The diode conducts current only

during switch off time. Peak reverse voltage is equal to

regulator input voltage. Average forward current in normal

operation can be calculated from:

ID(AVG) = IOUT (1 – DC)

This formula will not yield values higher than 1.5A with

maximum load current of 1.5A. The only reason to

consider a larger diode is the worst-case condition of a

high input voltage and shorted output. With a shorted

condition, diode current will increase to a typical value of

2A, determined by peak switch current limit. This is safe

for short periods of time, but it would be prudent to check

with the diode manufacturer if continuous operation

under these conditions must be tolerated.

BOOST PIN

For most applications, the boost components are a 0.1

µF

capacitor and an MMSD914TI diode. The anode is typi-

cally connected to the regulated output voltage to generate

a voltage approximately VOUT above VIN to drive the output

stage. However, the output stage discharges the boost

capacitor during the on time of the switch. The output

driver requires at least 3V of headroom throughout this

period to keep the switch fully saturated. If the output

voltage is less than 3V, it is recommended that an alternate

boost supply is used. The boost diode can be connected to

the input, although, care must be taken to prevent the 2

VIN boost voltage from exceeding the BOOST pin absolute

maximum rating. The additional voltage across the switch

driver also increases power loss, reducing efficiency. If

available, an independent supply can be used with a local

bypass capacitor.

A 0.1

µF boost capacitor is recommended for most appli-

cations. Almost any type of film or ceramic capacitor is

suitable, but the ESR should be <1

Ω to ensure it can be

fully recharged during the off time of the switch. The

capacitor value is derived from worst-case conditions of

1800ns on time, 42mA boost current and 0.7V discharge

ripple. The boost capacitor value could be reduced under

less demanding conditions, but this will not improve

circuit operation or efficiency. Under low input voltage and

low load conditions, a higher value capacitor will reduce

discharge ripple and improve start-up operation.

SHUTDOWN FUNCTION AND UNDERVOLTAGE

LOCKOUT

Figure 4 shows how to add undervoltage lockout (UVLO)

to the LT1956. Typically, UVLO is used in situations where

the input supply is

current limited, or has a relatively high

source resistance. A switching regulator draws constant

power from the source, so source current increases as

source voltage drops. This looks like a negative resistance

load to the source and can cause the source to current limit

or latch low under low source voltage conditions. UVLO

prevents the regulator from operating at source voltages

where these problems might occur.

Threshold voltage for lockout is about 2.38V. A 5.5

µA bias

current flows

out of the pin at this threshold. The internally

generated current is used to force a default high state on

the shutdown pin if the pin is left open. When low shut-

down current is not an issue, the error due to this current

can be minimized by making RLO 10k or less. If shutdown

current is an issue, RLO can be raised to 100k, but the error

due to initial bias current and changes with temperature

should be considered.

()

−

()

−

()

238

5 5

to 100k 25k suggested

VIN = minimum input voltage

Keep the connections from the resistors to the shutdown

pin short and make sure that interplane or surface capaci-

tance to the switching nodes are minimized. If high

resistor values are used, the shutdown pin should be

APPLICATIO S I FOR ATIO

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