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HM5259165B データシート(PDF) 34 Page - Elpida Memory

部品番号 HM5259165B
部品情報  512M LVTTL interface SDRAM 133 MHz/100 MHz 8-Mword 횞 16-bit 횞 4-bank/16-Mword 횞 8-bit 횞 4-bank /32-Mword 횞 4-bit 횞 4-bank PC/133, PC/100 SDRAM
PDF  63 Pages
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メーカー  ELPIDA [Elpida Memory]
ホームページ  http://www.elpida.com/en
Logo ELPIDA - Elpida Memory

HM5259165B データシート(HTML) 34 Page - Elpida Memory

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HM5259165B/HM5259805B/HM5259405B-75/A6
Data Sheet E0118H10
34
Read command to Precharge command interval (same bank):
When the precharge command is executed for the same bank as the read command that preceded it, the
minimum interval between the two commands is one clock. However, since the output buffer then becomes
High-Z after the clocks defined by l
HZP, there is a case of interruption to burst read data output will be
interrupted, if the precharge command is input during burst read. To read all data by burst read, the clocks
defined by l
EP must be assured as an interval from the final data output to precharge command execution.
READ to PRECHARGE Command Interval (same bank): To output all data
CAS Latency = 2, Burst Length = 4
CLK
Command
Dout
READ
PRE/PALL
out A0
out A1
out A2
out A3
CL=2
l
= -1 cycle
EP
CAS Latency = 3, Burst Length = 4
CLK
Command
Dout
READ
PRE/PALL
out A0
out A1
out A2
out A3
CL=3
l
= -2 cycle
EP



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