AN413 datasheet(33/45 Pages) STMICROELECTRONICS

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AN413

Examples of timer 0 configurations

Doc ID 1875 Rev 2

33/45

;

- continuous count

;ICR:

- EXTA TRIGGER

;

- Falling edge on EXTA

;

- EXTA no operation

;OACR-OBCR:

- no operation

;IDMR:

- no interrupt, DMA / CAPTURE REG0

;DCPR:

- DMA ext. data/program memory- DMA counter

;DAPR:

- DMA external program memory - DMA address

;IVR:

- interrupt vector 10h = T0_IT_VECT

;IDCR:

- interrupt dma priority level 4

spp #T0D_PG

; select Timer 0 data register

ld T_TCR,#01001000b ; TCR

ld T_TMR,#00001010b ; TMR

ld T_ICR,#01010100b ; ICR

ld T_PRSR,prescal_t0 ; PRESCALER

ld T_OACR,#11111100b ; OACR

ld T_OBCR,#11111100b ; OBCR

ld T_FLAGR,#00h

; FLAGR

ld T_IDMR,#00100000b ; IDMR

spp #T0C_PG

; select Timer 0 control register

ld T0_DCPR,#CPT_LG_DMA ; DCPR lg. DMA = 4ch = rr12

; = RR76

ld T0_DAPR,#CPT_AD_DMA ; DAPR ad. DMA = 48h = rr8

; = RR72

ld T0_IVR,#T0_IT_VECT ; IVR

ld T0_IDCR,#IT_T0_LEVEL ; priority level 4

ldw CPT_LG_DMA,lg_dma ; init DMA counter

ldw CPT_AD_DMA,#0ff00h ; DMA address in ROM is 0FF00h

T0_START_DMA_CAP ; enable Interrupt. and DMA

}

;********************************************************************

; Example for Timer 0 and Timer 1 in parallel mode

; A Toggle is generated on T0OUTB and T1OUTB on each overflow

;********************************************************************

;******************

;initialize TIMER 0

;******************

TIMER0::

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