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SM5843AS1 データシート(PDF) 16 Page - Nippon Precision Circuits Inc

部品番号 SM5843AS1
部品情報  Audio Multi-function Digital Filter
PDF  24 Pages
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メーカー  NPC [Nippon Precision Circuits Inc]
ホームページ  http://www.npc.co.jp/en
Logo NPC - Nippon Precision Circuits Inc

SM5843AS1 データシート(HTML) 16 Page - Nippon Precision Circuits Inc

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SM5843A
×1
NIPPON PRECISION CIRCUITS—16
Attenuation operation
When an attenuation value DATT is set, the attenua-
tion changes smoothly from the current attenuation
level to the new level. The new attenuation data is
stored in the attenuation register while the current
attenuation data is stored in a temporary register. The
attenuation then changes smoothly by ramping
between the two register values, updating the tempo-
rary register with each step. If a new attenuation
value for DATT is set before the previous target
attenuation level is reached, the attenuation then
ramps toward the new attenuation level.
When MUTE is HIGH, the attenuation level is
−∞.
When MUTE goes LOW (muting OFF), the attenua-
tion level returns to that of the original value of
DATT.
System Clock (XTI, XTO, CKO, CKSLN)
Two system clock frequencies, 384fs and 256fs, can
be used. An external clock source can be input on
XTI, or a crystal oscillator can be constructed by
connecting a crystal between XTI and XTO. The
system clock is also buffered and then output on
CKO. The system clock frequency selection and the
internal clock frequency are shown in the following
table.
Figure 4. Attenuation and mute timing
DATT1
DATT2
DATT2
DATT4
DATT3
(Gain)
Setting2
Setting3
−∞
MUTE
LH
L
Setting4
Time
Setting1
Parameter
CKSL
HIGH
LOW
XTI input clock frequency (fXI = 1/tXI)
384fs
256fs
CKO clock frequency
384fs
256fs
Internal clock frequency (tSYS)2 × tXI
tXI
Figure 5. Clock generator circuit
CKSLN
XTI
XTO
CKO
1 / 2
Internal system clock
(192fs or 256fs)
to timing controller



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