L7292 datasheet(17/60 Pages) STMICROELECTRONICS

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L7292

Voltage regulators

6.3

BUCK3 switching regulator

Unless otherwise noted, typical values at TA = 25 °C, Vin = 5.0 V.

The max. values are at Tj = 125 °C and the worst case process.

Table 12. BUCK3 switching regulator

Parameter

Conditions

Min.

Typ.

Max.

Unit

DC bias current

PFM mode

Deep sleep mode no load

µA

Output DC voltage range

Steady state, ILOAD < 1 A

0.7

1.3

Output voltage step size

Single step change

Load current range

Internal FET, steady state

0.5

Current limit threshold

Integrated FET current

2.0(1)

PFM current peak

Programmable

0.8

DC line regulation

3.3 V < VSUP < 5 V, Iout = 0.5 A

0.4(1)

%/V

DC load regulation

While in PWM

PSR3CFG bit 7 = 1

0.1(1)

%/A

Switching frequency

Programmable

1.3

MHz

Output voltage accuracy

While in PWM

-2

Transient response

Load transient time = 10 µs. Referring to CCM,

Vout = 1.1 V, load current from 0 to 80% Imax.

±3(1)

Soft-start time

Vin = 3.3 V, output voltage ramp from 0 to 95% of

final Vout = 1.1 V Rload = 3.0



130(1) 160(1)

µs

Integrated high-side PFET RDS

Vin = 5 V

172



Vin = 3.3 V

216

Integrated low-side NFET RDS

Vin = 5 V

Vin = 3.3 V

106

Efficiency

Vin = 5.0 V, Vout = 1.1 V, Iload = 1 mA

78(2)

Vin = 3.3 V, Vout = 1.1 V, Iload = 1 mA

81(2)

Vin = 5.0 V, Vout = 1.1 V, Iload = 0.5 A

80(2)

Vin = 3.3 V, Vout= 1.1 V, Iload = 0.5 A

81(2)

FB input impedance

0.2



Input capacitor

4.7

µF

Output filter capacitor

µF

Output filter capacitor ESR



Output filter inductance

1.0

µH

1. Guaranteed by design.

2. Efficiency measured between the SUP3 PIN and BUCK3 POUT. L = 1

H, DC resistance max. = 0.036 .

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