L7292 datasheet(25/60 Pages) STMICROELECTRONICS

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L7292

I2C interface

8.3.5

To start communication between the bus master and the slave device, the bus master must

initiate a Start condition. Following this, the bus master sends the device select code (on

Serial Data (SDA), the most significant bit first). The device select code consists of a 7-bit

device type identifier which for the L7292 device is 0x7C.

The 8th bit is the Read/Write bit (RW). This bit is set to 1 for Read and 0 for Write operations.

If a match occurs on the device select code, the corresponding device gives an

acknowledgment on Serial Data (SDA) during the 9th bit time. If the device does not match

the device select code, it deselects itself from the bus.

8.3.6

Write operations

Following a Start condition the bus master sends a device select code with the Read/Write

bit (RW) reset to 0. The device acknowledges this and waits for one address bytes. The

device responds to the address byte with an acknowledge bit, and then waits for the data

byte.

A Write instruction issued on a Read Only or a reserved address does not modify the

8.3.7

Byte Write

After the device selects the code and the address byte, the bus master sends one data byte.

After the data byte the device responds with an ACK bit, also if the address is read only or

reserved. The bus master terminates the transfer by generating a Stop condition or

a repeated Start condition.

8.3.8

Sequential Write

The Sequential Write mode allows up to all bytes to be written in a single Write cycle. After

each byte is transferred, the internal byte address counter is incremented. The transfer is

terminated by the bus master generating a Stop condition.

Figure 7. Byte Write

L7292 データシート(PDF) 25 Page - STMicroelectronics