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BCM4354 データシート(PDF) 49 Page - Cypress Semiconductor

部品番号 BCM4354
部品情報  Single-Chip 5G Wi-Fi IEEE 802.11ac 2횞2 MAC/ Baseband/Radio with Integrated Bluetooth 4.1 and FM Receiver
PDF  192 Pages
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メーカー  CYPRESS [Cypress Semiconductor]
ホームページ  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

BCM4354 データシート(HTML) 49 Page - Cypress Semiconductor

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PCM Interface
BCM4354 Data Sheet
BROADCOM CONFIDENTIAL
Broadcom®
October 15, 2014 • 4354-DS109-R
Page 48
Short Frame Sync, Slave Mode
Figure 11: PCM Timing Diagram (Short Frame Sync, Slave Mode)
Table 8: PCM Interface Timing Specifications (Short Frame Sync, Slave Mode)
Ref No.
Characteristics
Minimum
Typical Maximum Unit
1
PCM bit clock frequency
–
–
12
MHz
2
PCM bit clock LOW
41
–
–
ns
3
PCM bit clock HIGH
41
–
–
ns
4
PCM_SYNC setup
8
–
–
ns
5
PCM_SYNC hold
8
–
–
ns
6
PCM_OUT delay
0
–
25
ns
7
PCM_IN setup
8
–
–
ns
8
PCM_IN hold
8
–
–
ns
9
Delay from rising edge of PCM_BCLK during last bit
period to PCM_OUT becoming high impedance
0–
25
ns
PCM_BCLK
PCM_SYNC
PCM_OUT
1
23
4
5
6
PCM_IN
7
9
HIGH IMPEDANCE
8



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