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BCM4354 データシート(PDF) 69 Page - Cypress Semiconductor |
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BCM4354 データシート(HTML) 69 Page - Cypress Semiconductor |
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69 / 192 page ![]() UART Interface BCM4354 Data Sheet BROADCOM CONFIDENTIAL Broadcom® October 15, 2014 • 4354-DS109-R Page 68 UART Interface One 2-wire UART interface can be enabled by software as an alternate function on GPIO pins. Refer to Table 26: “GPIO Alternative Signal Functions,” on page 120. Provided primarily for debugging during development, this UART enables the BCM4354 to operate as RS-232 data termination equipment (DTE) for exchanging and managing data with other serial devices. It is compatible with the industry standard 16550 UART, and provides a FIFO size of 64 × 8 in each direction. JTAG Interface The BCM4354 supports the IEEE 1149.1 JTAG boundary scan standard for performing device package and PCB assembly testing during manufacturing. In addition, the JTAG interface allows Broadcom to assist customers by using proprietary debug and characterization test tools during board bring-up. Therefore, it is highly recommended to provide access to the JTAG pins by means of test points or a header on all PCB designs. Refer to Table 26: “GPIO Alternative Signal Functions,” on page 120 for JTAG pin assignments. SPROM Interface Various hardware configuration parameters may be stored in an external SPROM instead of the OTP. The SPROM is read by system software after device reset. In addition, depending on the board design, customer- specific parameters may be stored in SPROM. The four SPROM control signals —SPROM_CS, SPROM_CLK, SPROM_MI, and SPROM_MO are multiplexed on the SDIO interface (see Table 26: “GPIO Alternative Signal Functions,” on page 120 for additional details). By default, the SPROM interface supports 2 kbit serial SPROMs, and it can also support 4 kbit and 16 kbit serial SPROMs by using the appropriate strapping option. SFLASH Interface For use only when the HSIC interface mode is selected, an interface to external SFLASH is available. The four SFLASH control signals —SFLASH_CS#, SFLASH_CLK, SFLASH_MI, and SFLASH_MO are multiplexed on the SDIO interface (see Table 26: “GPIO Alternative Signal Functions,” on page 120 for additional details). |
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