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LM10504 データシート(PDF) 4 Page - Texas Instruments

部品番号 LM10504
部品情報  LM10504 Triple Buck LDO Power Management Unit
PDF  38 Pages
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メーカー  TI1 [Texas Instruments]
ホームページ  http://www.ti.com
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LM10504 データシート(HTML) 4 Page - Texas Instruments

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LM10504
SNVS739E – DECEMBER 2011 – REVISED MARCH 2013
www.ti.com
Table 2. PIN DESCRIPTIONS (continued)
Pin #
Pin Name
I/O(1)
Type(2)
Functional Description
Digital Input Startup Control Signal to change predefined output Voltage of Buck 3,
F4
Vselect_B3
I
D
internally pulled up as a default.
Digital Input Control Signal for entering Device Sleep Mode. This is an active High pin
E7
DevSLP
I
D
with an internal pulldown resistor. Lowers core ASIC voltage and turns off the FLASH
and I/O bucks.
Digital Input Control Signal to abort SPI transactions; resets the PMIC to default
F7
RESET
I
D
voltages. This is an active Low pin with an internal pullup.
C7
VCOMP
I
A
Analog Input for Comparator
A1
Interrupt
O
D
Digital Output of Comparator to signal interrupt condition
F1
SPI_CS
I
D
SPI Interface - chip select
D1
SPI_DI
I
D
SPI Interface - serial data input
E1
SPI_DO
O
D
SPI Interface - serial data output
C1
SPI_CLK
I
D
SPI Interface - serial clock input
B1
VIN_IO
I
A
Supply Voltage for Digital Interface
B2
GND
G
G
Ground. Connect to system Ground.
B3
GND
G
G
Ground. Connect to system Ground.
D7
GND
G
G
Connect to system Ground; decouple closely to A3.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings
(1) (2)
VIN, VCOMP
−0.3V to +6.0V
VIN_IO, VIN_B1, VIN_B2, VIN_B3, SPI_CS, SPI_DI, SPI_CLK, SPI_DO, Vselect_B2,Vselect_B3,
RESET, SW_1, SW_2, SW_3, FB_1, FB_2, FB_3, LDO, Interrupt, DevSLP
−0.3V to +6.0V
Junction Temperature (TJ-MAX)
150°C
Storage Temperature
−65°C to 150°C
ESD Rating
Human Body Model (HBM)
2.0kV
(1)
Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which
operation of the device is ensured. Operating Ratings do not imply ensured performance limits. For ensured performance limits and
associated test conditions, see the Electrical Characteristics tables.
(2)
If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
Operating Ratings
(1) (2) (3)
VIN_B1, VIN_B2_VIN_B3, VIN
3.0V to 5.5V
VIN_IO
1.72V to 3.63V but < VIN
All pins other than VIN_IO
0V to VIN
Junction Temperature (TJ)
−30°C to 125°C
Ambient Temperature (TA)
−30°C to 85°C
Junction-to-Ambient Thermal Resistance (
θJA)
44.5°C/W
Maximum Continuous Power Dissipation (PD-MAX)
0.9W
(1)
Internal thermal shutdown protects device from permanent damage. Thermal shutdown engages at TJ = +140°C and disengages at TJ
= +120°C (typ.). Thermal shutdown is ensured by design.
(2)
In applications where high power dissipation and/or poor thermal resistance is present the maximum ambient temperature may have to
be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = +125°C),
the maximum power dissipation of the device in the application (PD-MAX), and the junction-to-ambient thermal resistance of the
part/package in the application (
θJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX).
(3)
The amount of Absolute Maximum power dissipation allowed for the device depends on the ambient temperature and can be calculated
using the formula: P = (TJ–TA)/θJA, where TJ is the junction temperature, TA is the ambient temperature, and θJA is the junction-to-
ambient thermal resistance.
θJA is highly application and board-layout dependent. Internal thermal shutdown circuitry protects the device
from permanent damage. (See General Electrical Characteristics.)
4
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