Detailed Description

Rail-to-Rail Input Stage

The MAX4230–MAX4234 CMOS operational amplifiers

have parallel-connected N- and P-channel differential

input stages that combine to accept a common-mode

range extending to both supply rails. The N-channel

stage is active for common-mode input voltages typi-

stage is active for common-mode input voltages typi-

Applications Information

Package Power Dissipation

Warning: Due to the high output current drive, this op

amp can exceed the absolute maximum power-dissi-

pation rating. As a general rule, as long as the peak cur-

rent is less than or equal to 40mA, the maximum package

power dissipation is not exceeded for any of the package

types offered. There are some exceptions to this rule,

however. The absolute maximum power-dissipation rating

of each package should always be verified using the fol-

lowing equations. The equation below gives an approxi-

mation of the package power dissipation:

where:

ing current.

and the load.

θ = phase difference between the voltage and the cur-

rent. For resistive loads, COS

θ = 1.

P

V

I

COS

IC DISS

RMS RMS

High-Output-Drive, 10MHz, 10V/µs,

Rail-to-Rail I/O Op Amps with Shutdown in SC70

8

_______________________________________________________________________________________

PIN

MAX4230

SOT23/

SC70

MAX4231

SOT23/

SC70

MAX4232

SOT23/

µMAX

MAX4233

µMAX

MAX4233

UCSP

MAX4234

TSSOP/

SO

NAME

FUNCTION

11

——

——

IN+

Noninverting Input

224

4

B4

11

Negative Supply Input. Connect to

ground for single-supply operation.

33

——

——

IN-

Inverting Input

44

——

——

OUT

Amplifier Output

5

6

8

10

B1

4

Positive Supply Input

—

5

—

5, 6

C4, A4

—

SHDN,

SHDN1,

SHDN2

Shutdown Control. Tie to high for normal

operation.

——

3

3

C3

3

IN1+

Noninverting Input to Amplifier 1

——

2

2

C2

2

IN1-

Inverting Input to Amplifier 1

——

1

1

C1

1

OUT1

Amplifier 1 Output

——

5

7

A3

5

IN2+

Noninverting Input to Amplifier 2

——

6

8

A2

6

IN2-

Inverting Input to Amplifier 2

——

7

9

A1

7

OUT2

Amplifier 2 Output

———

—

—

10, 12

IN3+,

IN4+

Noninverting Input to Amplifiers 3 and 4

———

—

—

9, 13

IN3-, IN4-

Inverting Input to Amplifiers 3 and 4

———

—

—

8, 14

OUT3,

OUT4

Amplifiers 3 and 4 Outputs

Pin Description