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ST7MC1 データシート(PDF) 280 Page - STMicroelectronics |
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ST7MC1 データシート(HTML) 280 Page - STMicroelectronics |
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280 / 308 page ![]() ST7MC1/ST7MC2 280/308 12.14 10-BIT ADC CHARACTERISTICS Subject to general operating conditions for VDD, fOSC, and TA unless otherwise specified. Figure 157. RAIN max. vs fADC with CAIN=0pF 3) Figure 158. Recommended CAIN & RAIN values. 4) Symbol Parameter Conditions Min Typ Max Unit VAREF Analog Reference Voltage 3 VDD V fADC ADC clock frequency 4 MHz VAIN Conversion voltage range 1) VSSA VAREF V Ilkg Positive input leakage current for analog input ±1 µA Negative input leakage current on analog pins VIN<VSS, | IIN |< 400µA on adjacent analog pin 56 µA RAIN External input impedance see Figure 157 and Figure 158 2)3)4) k Ω CAIN External capacitor on analog input pF fAIN Variation freq. of analog input signal Hz CADC Internal sample and hold capacitor 6 pF tADC Conversion time (Sample+Hold) fCPU=8MHz, fADC=4MHz, ADSTS bit in MCCBCR register = 0 3.5 µs - Sample capacitor loading time - Hold conversion time 4 10 1/fADC Conversion time (Sample+Hold) fCPU=8MHz, fADC=4MHz, ADSTS bit in MCCBCR register = 1 6.5 µs - Sample capacitor loading time - Hold conversion time 16 10 1/fADC RAREF Analog Reference Input Resistor 11 k Ω 0 5 10 15 20 25 30 35 40 45 010 30 70 CPARASITIC (pF) 2 MHz 1 MHz 0.1 1 10 100 1000 0.01 0.1 1 10 fAIN(KHz) Cain 10 nF Cain 22 nF Cain 47 nF |
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