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ST7MC1 データシート(PDF) 281 Page - STMicroelectronics |
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ST7MC1 データシート(HTML) 281 Page - STMicroelectronics |
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281 / 308 page  ST7MC1/ST7MC2 281/308 10-BIT ADC CHARACTERISTICS (Cont’d) Figure 159. Typical Application with ADC Notes: 1. When VSSA pins are not available on the pinout, the ADC refer to VSS. 2. Any added external serial resistor will downgrade the ADC accuracy (especially for resistance greater than 10k Ω). Data based on characterization results, not tested in production. 3. CPARASITIC represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the pad ca- pacitance (3pF). A high CPARASITIC value will downgrade conversion accuracy. To remedy this, fADC should be reduced. 4. This graph shows that depending on the input signal variation (fAIN), CAIN can be increased for stabilization time and decreased to allow the use of a larger serial resistor (RAIN). AINx ST7MC VDD IL ±1 µA VT 0.6V VT 0.6V VAIN RAIN VAREF VSSA 0.1 µF VDD RAREF CADC 6pF CAIN 10-Bit A/D Conversion 2k Ω(max) |
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