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ADP3500AST データシート(PDF) 11 Page - List of Unclassifed Manufacturers

部品番号 ADP3500AST
部品情報  CDMA Power Management System
PDF  29 Pages
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メーカー  ETC [List of Unclassifed Manufacturers]
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ADP3500AST データシート(HTML) 11 Page - List of Unclassifed Manufacturers

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ADP3500
REV.PrP 2/6/02
- 11 -
BLOCK DIAGRAM
Serial
I/F
LPF
OPT2-
PWRONKEY-
OPT1-
OPT3
INT-
KEYPADCOL0
KEYPADROW0
6
OSC IN
OSC OUT
32K OUT
VBAT
Charger_Detect
Delay
10mS
Data
In
32KHz
Delay
30mS
RTC
/clock
Stay/Alive
Timer
0.25-8sec
CLKs
Data
Delay
50mS
RSTDELAY-
RESET+
TEST
RTCV
DGND
DGND
RESETIN-
GPIO3
GPIO2
GPIO1
GPIO0
DATA
CLKIN
CS
REFO
Voltage
Detector
LDO1 (Baseband VDD)
LDO2 (Baseband AVDD)
LDO3 (RTC/Coin-cell)
LDO11 (Option)
LDO4 (Audio)
LDO6 (Baseband Core)
LDO5 (Vibrator)
LDO7 (RF Rx1)
LDO8 (RF Tx)
LDO9 (RF Rx2)
LDO10 (RF Option)
ADAPTER ISENSE
Battery Charger
BASE
BVS
AGND
BATID
MVBAT (VBAT Measure)
REF
NRCAP
VBAT
Charger Control
PWROFF
INT
RTC
Alarm
KEY
PAD
I/F
4
GPIO
+
INT
BLIGHT
LDO1
LDO2
LDO3
LDO6
LDO11
LDO4
LDO5
LDO7
LDO8
LDO9
LDO10
ON/OFF
LOGIC
ON/OFF
LOGIC
ON/OFF
LOGIC
ON/OFF
LOGIC
Main
Sub
Main
Sub
Main
Main
Sub
TCXO_ON
DGND
RTCV
RESETOUT-
voltage_detect
CLK
RESETIN_N
Data
Open Drain
BATID
DDLO
LDO_EN
SLEEP-
GPIO_INT / gpi_intrst
DATA
DATA
POWERON_N
OPT1_N
OPT2_N
OPT3
INT_N
power_on
CLKs
5
sync
5
LDO1
LDO1
Level
trans
30
31
33
32
17
13
12
28
REF
LDO1
Level
trans
35
53
51
49
47
44
43
46
38
41
36
55
40
57
60
54
58
61
59
34
37
42
45
48
52
19
39
50
56
62
63
64
1
16
3
4
5
6
7
8
9
10
11
2
Level
trans
LDO1
14
KEYPADCOL1
KEYPADCOL2
KEYPADCOL3
KEYPADROW1
KEYPADROW2
KEYPADROW3
KEYPADROW4
KEYPADROW5
15
26
27
25
21
22
23
24
20
18
29
LDO1
RTCV
Level Translator
Level
trans
Level
trans
CLK
140K
Ω
100K
Ω
Level Translator
VBAT & RTCV
Figure 3. Overall Block Diagram
PRELIMINARY TECHNICAL DATA



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